Patents by Inventor Kuang Yi Chang

Kuang Yi Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240144467
    Abstract: A hot spot defect detecting method and a hot spot defect detecting system are provided. In the method, hot spots are extracted from a design of a semiconductor product to define a hot spot map comprising hot spot groups, wherein local patterns in a same context of the design yielding a same image content are defined as a same hot spot group. During runtime, defect images obtained by an inspection tool performing hot scans on a wafer manufactured with the design are acquired and the hot spot map is aligned to each defect image to locate the hot spot groups. The hot spot defects in each defect image are detected by dynamically mapping the hot spot groups located in each defect image to a plurality of threshold regions and respectively performing automatic thresholding on pixel values of the hot spots of each hot spot group in the corresponding threshold region.
    Type: Application
    Filed: January 8, 2024
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Huei Chen, Pei-Chao Su, Xiaomeng Chen, Chan-Ming Chang, Shih-Yung Chen, Hung-Yi Chung, Kuang-Shing Chen, Li-Jou Lee, Yung-Cheng Lin, Wei-Chen Wu, Shih-Chang Wang, Chien-An Lin
  • Publication number: 20240120410
    Abstract: A semiconductor structure includes a semiconductor epitaxial layer, a first semiconductor well, a second semiconductor well, a source doped region, a gate structure and a drain structure. The semiconductor epitaxial layer includes a first side and a second side opposite to the first side. The first semiconductor well is located on the first side of the semiconductor epitaxial layer. The second semiconductor well is located on the second side of the semiconductor epitaxial layer. The source doped region is located in the first semiconductor well. The gate structure overlaps the first semiconductor well and the source doped region on the first side of the semiconductor epitaxial layer. The drain structure includes a semiconductor substrate. The second side of the semiconductor epitaxial layer outside the second semiconductor well includes a connecting surface. The connecting surface of the semiconductor epitaxial layer is connected to the semiconductor substrate.
    Type: Application
    Filed: February 16, 2023
    Publication date: April 11, 2024
    Inventors: Yu-Tsu LEE, Yan-Ru CHEN, Chao-Yi CHANG, Kuang-Hao CHIANG
  • Publication number: 20110021217
    Abstract: Short message-based terminal communication systems and methods are provided. The system includes a transmission terminal, a central server, and at least one reception terminal. The transmission terminal generates a short message, and transmits the short message to the central server. The short message includes a service identifier, an application parameter, contents, and at least one reception terminal. The central server parses the short message, and transmits the short message to the at least one reception terminal. After the short message is received, the reception terminal determines whether the service identifier conforms to a predefined service identifier. If so, the reception terminal launches a specific application procedure according to the application parameter, and displays the contents of the short message in the specific application procedure.
    Type: Application
    Filed: July 22, 2010
    Publication date: January 27, 2011
    Applicant: JYT, INC.
    Inventors: Kuo-Hsien Wang, Kuang Yi Chang