Abstract: A method for forming a contact to a selective region of an integrated circuit characterized by the steps of: forming a layer of refractory metal over and around the selected region; forming a layer of amorphous silicon over the layer of refractory metal; patterning the amorphous silicon in to an elongated strip which extends away from the selected region; annealing the integrated circuit to convert the strip of amorphous silicon into a silicide path; and removing the unreacted refractory metal. The method of the present invention can be used to extend a contact to the source, drain, or gate of a MOSFET from the top of an adjacent section of field oxide, and can also be used as a method for local interconnection of IC devices, such as CMOS devices.

Abstract: A method of fabricating a coplanar, self-aligned contact structure in a semiconductor device. Polysilicon pads are placed on top of field oxide regions which adjoin source and drain diffusion regions of the device. Strips of highly conductive material such as titanium silicide or titanium nitride are formed on top of each pad; each strip extends down a side of its pad to an adjoining diffusion region, thereby establishing a conductive path between the diffusion region and the top of the pad. Contacts are established by etching holes through a passivation layer which covers the device to reach the conductive strips on top of the pads.

Abstract: A method of fabricating a semiconductor device in an integrated circuit. A conductive titanium layer is deposited on a substrate in which source, drain and gate regions have been created. A titanium nitride layer is applied as a cap over the titanium layer. A first anneal at a relatively low temperature is performed, causing portions of the titanium which are adjacent the silicon surface to form a titanium-silicon compound and causing the remaining titanium and titanium nitride to form a nitride coating. This nitride coating is etched away and a final high-temperature anneal is performed, resulting in thick, smooth titanium silicide (TiSi.sub.2) layers on the source and drain regions and gate pads.

Abstract: A method for forming a contact to a selective region of an integrated circuit characterized by the steps of: forming a layer of refractory metal over and around the selected region; forming a layer of amorphous silicon over the layer of refractory metal; patterning the amorphous silicon into an elongated strip which extends away from the selected region; annealing the integrated circuit to convert the strip of amorphous silicon into a silicide path; and removing the unreacted refractory metal. The method of the present invention can be used to extend a contact to the source, drain, or gate of a MOSFET from the top of an adjacent section of field oxide, and can also be used as a method for local interconnection of IC devices, such as CMOS devices.