Abstract: In an embodiment, a method includes: aligning a first package component with a second package component, the first package component having a first region and a second region, the first region including a first conductive connector, the second region including a second conductive connector; performing a first laser shot on a first portion of a top surface of the first package component, the first laser shot reflowing the first conductive connector of the first region, the first portion of the top surface of the first package component completely overlapping the first region; and after performing the first laser shot, performing a second laser shot on a second portion of the top surface of the first package component, the second laser shot reflowing the second conductive connector of the second region, the second portion of the top surface of the first package component completely overlapping the second region.

Abstract: The present invention relates to a package module for a memory IC chip, in which first solder pads provided on an upper surface of the memory IC chip is electrically connected to lower contact pads provided on the periphery of the ground pad, lower contact pads is soldered upward with lead frames and upper contact pads, and lastly a molding layer is used for packaging and enclosing the above elements, while only exposing the lower contact pads and the upper contact pads. Therefore, it will facilitate that each of upper contact pads of a lower layer is correspondingly soldered to one of lower contact pads of an upper layer as the upper layer and the lower layer are stacked together. Thus, it is capable of obtain high acceptable production yield, while accomplishing the object of expanding the memory capacity in total when stacking the layers of the package structure.

Abstract: The present invention relates to a package module for a memory IC chip, in which first solder pads provided on an upper surface of the memory IC chip is electrically connected to lower contact pads provided on the periphery of the ground pad, lower contact pads is soldered upward with lead frames and upper contact pads, and lastly a molding layer is used for packaging and enclosing the above elements, while only exposing the lower contact pads and the upper contact pads. Therefore, it will facilitate that each of upper contact pads of a lower layer is correspondingly soldered to one of lower contact pads of an upper layer as the upper layer and the lower layer are stacked together. Thus, it is capable of obtain high acceptable production yield, while accomplishing the object of expanding the memory capacity in total when stacking the layers of the package structure.

Abstract: An ultra thin semiconductor device has a lead frame for holding a chip and an encapsulant sealing the chip and the lead frame. The lead frame has a die pad and multiple leads for wire bonding with the chip. A die recess to hold the chip is defined in the die pad. A depth of the die recess decreases a total height of the chip and the die pad to provide the wires enough bonding space. That is, the semiconductor device easily has a 0.4 mm thickness to be an ultra thin semiconductor product.