Abstract: A scanning method of a display of the present invention changes a driving order of a plurality of gate driver lines according to a image data so as to reduce switching currents generated while a plurality of voltages on a plurality of source driver lines are changed. Thereby, the goal of saving power can be reached.

Abstract: A scanning method of a display of the present invention changes a driving order of a plurality of gate driver lines according to a image data so as to reduce switching currents generated while a plurality of voltages on a plurality of source driver lines are changed. Thereby, the goal of saving power can be reached.

Abstract: A scanning method of a display of the present invention changes a driving order of a plurality of gate driver lines according to a frame data so as to reduce switching currents generated while a plurality of voltages on a plurality of source driver lines are changed. Thereby, the goal of saving power can be reached.

Abstract: A scanning method of a display changes a driving order of a plurality of gate driver lines so as to reduce switching currents generated while a plurality of voltages on a plurality of source driver lines are changed. Thereby, the goal of saving power can be reached.

Abstract: An LCD panel driving method and device with charge sharing is disclosed. The LCD panel includes a plurality of switches, a plurality of data lines, a signal driving circuit for generating a plurality of image signals, a charge sharing common voltage driving circuit and a common capacitor having one end connected to the charge sharing common voltage driving circuit through a common voltage node. The method turns the switches on to thereby form the charge sharing common voltage driving circuit and the signal driving circuit as a short circuit, such that charges stored in the common capacitor flow into the data lines to drive the common voltage node to enter in an inverse phase state in order to sequentially turn the switches on and then off to accordingly sample the respective data lines.

Abstract: A method for driving a display panel is provided. The display panel includes a first scan line, and the first scan line includes sub-pixels. A first portion of the sub-pixels is controlled by a first gate line, and a second portion of the sub-pixels is controlled by a second gate line. The arrangement of the sub-pixels of the first portion and the second portion are in an interlaced arrangement. The method includes the following steps. First, drive the first gate line and then drive the second gate line in a first image duration. Then, drive the second gate line and then drive the first gate line in a second image duration.

Abstract: An output stage circuit is disclosed, which includes a first PMOS transistor, a second PMOS transistor, a first NMOS transistor, and a second NMOS transistor. By using twin-well CMOS transistors and a specific circuit configuration, the invention supports a HALF AVDD structure, reduces power consumption and saves the cost of triple-well CMOS process.

Abstract: An output stage circuit is disclosed, which includes a first PMOS transistor, a second PMOS transistor, a first NMOS transistor, and a second NMOS transistor. By using twin-well CMOS transistors and a specific circuit configuration, the invention supports a HALF AVDD structure, reduces power consumption and saves the cost of triple-well CMOS process.

Abstract: A method for stabling a voltage, a pulse frequency modulating circuit and a power supply using the same are provided. The method includes the following steps. First, a comparing signal is provided. Then, set the comparing signal to be a first logic state when the voltage to be stabilized is lower than a preset voltage. Next provide a pulse signal when the comparing signal is set in the first logic state. Afterwards, adjust the enable time of the pulse signal based on the number of times of logic state changing of the comparing signal within a preset period and, adjust the voltage according to the enable time of the pulse signal.

Abstract: A method for driving a display panel is provided. The display panel includes a first scan line, and the first scan line includes sub-pixels. A first portion of the sub-pixels is controlled by a first gate line, and a second portion of the sub-pixels is controlled by a second gate line. The arrangement of the sub-pixels of the first portion and the second portion are in an interlaced arrangement. The method includes the following steps. First, drive the first gate line and then drive the second gate line in a first image duration. Then, drive the second gate line and then drive the first gate line in a second image duration.

Abstract: A method for stabling a voltage, a pulse frequency modulating circuit and a power supply using the same are provided. The method includes the following steps. First, a comparing signal is provided. Then, set the comparing signal to be a first logic state when the voltage to be stabilized is lower than a preset voltage. Next provide a pulse signal when the comparing signal is set in the first logic state. Afterwards, adjust the enable time of the pulse signal based on the number of times of logic state changing of the comparing signal within a preset period and, adjust the voltage according to the enable time of the pulse signal.