Patents by Inventor Kuei-Lun Lin

Kuei-Lun Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11107897
    Abstract: Semiconductor devices, FinFET devices and methods of forming the same are disclosed. One of the semiconductor devices includes a substrate and a gate structure over the substrate. The gate structure includes a high-k layer over the substrate, a shielding layer over the high-k layer, and an N-type work function metal layer over the shielding layer. In some embodiments, the shielding layer has a dielectric constant less than a dielectric constant of the high-k layer.
    Type: Grant
    Filed: July 28, 2019
    Date of Patent: August 31, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Che-Hao Chang, Cheng-Hao Hou, Kuei-Lun Lin, Kun-Yu Lee, Xiong-Fei Yu, Chi-On Chui
  • Publication number: 20210126101
    Abstract: A semiconductor device a method of forming the same are provided. The method includes forming a fin extending from a substrate and forming a gate dielectric layer along a top surface and sidewalls of the fin. A first thickness of the gate dielectric layer along the top surface of the fin is greater than a second thickness of the gate dielectric layer along the sidewalls of the fin.
    Type: Application
    Filed: September 11, 2020
    Publication date: April 29, 2021
    Inventors: Kuei-Lun Lin, Yen-Fu Chen, Po-Ting Lin, Chia-Yuan Chang, Xiong-Fei Yu, Chi On Chui
  • Publication number: 20210028285
    Abstract: Semiconductor devices, FinFET devices and methods of forming the same are disclosed. One of the semiconductor devices includes a substrate and a gate structure over the substrate. The gate structure includes a high-k layer over the substrate, a shielding layer over the high-k layer, and an N-type work function metal layer over the shielding layer. In some embodiments, the shielding layer has a dielectric constant less than a dielectric constant of the high-k layer.
    Type: Application
    Filed: July 28, 2019
    Publication date: January 28, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Che-Hao Chang, Cheng-Hao Hou, Kuei-Lun Lin, Kun-Yu Lee, Xiong-Fei Yu, Chi-On Chui
  • Patent number: 10367078
    Abstract: Semiconductor devices, FinFET devices and methods of forming the same are disclosed. One of the semiconductor devices includes a substrate and a gate structure over the substrate. The gate structure includes a high-k layer over the substrate, a shielding layer over the high-k layer, and an N-type work function metal layer over the shielding layer. In some embodiments, the shielding layer has a dielectric constant less than a dielectric constant of the high-k layer.
    Type: Grant
    Filed: January 22, 2018
    Date of Patent: July 30, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Yuan Chang, Che-Hao Chang, Cheng-Hao Hou, Kuei-Lun Lin, Kun-Yu Lee, Xiong-Fei Yu, Chi-On Chui
  • Publication number: 20190140082
    Abstract: Semiconductor devices, FinFET devices and methods of forming the same are disclosed. One of the semiconductor devices includes a substrate and a gate structure over the substrate. The gate structure includes a high-k layer over the substrate, a shieling layer over the high-k layer, and an N-type work function metal layer over the shielding layer. In some embodiments, the shielding layer has a dielectric constant less than a dielectric constant of the high-k layer.
    Type: Application
    Filed: January 22, 2018
    Publication date: May 9, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Yuan Chang, Che-Hao Chang, Cheng-Hao Hou, Kuei-Lun Lin, Kun-Yu Lee, Xiong-Fei Yu, Chi-On Chui