Abstract: The present invention relates to a bottle with a peripheral chamber. The bottle comprises a bottle body, a wall of the bottle body curving inwards thus creating a chamber therein, and a cover of the chamber. The cover can be opened or closed by using a concave depression on the bottle body. The bottle further comprises a container of the chamber so that the chamber can hold a second object in addition to a first object in the bottle body. The bottle is capable of carrying different objects simultaneously. Since the chamber is formed directly from the bottle body, the present invention is simple in structure, easy to manufacture, and low in cost.

Abstract: An apparatus is provided for fabricating a semiconductor device by thermal gradient zone melting, whereby metal-rich droplets such as aluminum migrate through a semiconductor wafer such as silicon to create conductive paths. One surface of the wafer is placed directly on a heating surface to establish a high and uniform thermal gradient through the wafer. Heat in the wafer is removed from the other wafer surface. The apparatus for fabricating semiconductor devices utilizing temperature gradient zone melting comprises a base, heating means and heat sink means. Heating means comprises a platform having a generally planar heating surface adapted to receive the entire area of the one surface of at least one wafer. The heat sink means is spaced away from the other wafer surface to form a space therebetween, the space being adapted to receive a high heat conductive gas. The heat sink means and the gas cooperatively remove the heat in the wafer to enhance the establishment of the thermal gradient.

Abstract: Disclosed is a hybrid Schottky barrier focal plane, which includes a transparent semiconducting detector substrate of a first conductivity, with an array of detector groups disposed on the detector substrate, each group including a plurality of Schottky barrier detectors. An output contact is provided on the detector substrate for each of the detector groups. A field effect transistor for each detector includes a source region of a second conductivity type in the detector substrate and connected to the detector, a drain region of the second conductivity type in the detector substrate over the source and drain regions for controlling the connection between the source region and the drain region. An array of output contacts are disposed on a semiconducting multiplexer substrate, which also includes a charge coupled circuit for converting parallel signals from the input contacts to a serial output signal.

Abstract: A process is provided for fabricating a semiconductor device by thermal gradient zone melting, whereby metal-rich droplets such as aluminum migrate through a semiconductor wafer such as silicon to create conductive paths. One surface of the wafer in provided with a buffer layer thereon, which is placed directly on a heating surface. The buffer layer terminates the migration of the droplets to prevent alloying of the droplets with the heating surface.

Abstract: A large scale parallel architecture in which many parallel channels numbering 10.sup.2 or more operate simultaneously to create a natural and efficient organization for processing two-dimensional arrays of data. The architecture comprises a plurality of stack integrated circuit wafers having top and bottom surfaces, electric signal paths extending through each of the wafers between the surfaces, and micro-interconnects (smaller than 50 mil) on the surfaces of adjacent wafers interconnecting the respective eletric signal paths with a topographical one-to-one correspondence.

Abstract: A liquid crystal light valve having an improved counterelectrode structure. The light valve includes a layer of liquid crystal material which lies intermediate a photosensitive substrate of intrinsic semiconductive material and the counterelectrode. The upper surface of the substrate is characterized by a highly doped peripheral channel stop. The counterelectrode comprises electrically insulated inner and outer regions, the inner region substantially overlying only the intrinsic material interior said highly doped peripheral channel stop so that an electrical bias may be selectively applied, greatly enhancing the dark current breakdown voltage of the device.

Abstract: A method of making a multilevel conductor pattern for a semiconductor device. An aluminum layer on the substrate surface provides a situs for first level conductors. Successive soft and hard anodization steps are advantageously used to provide excellent intralevel isolation and interlevel electrical connection in desired areas. First level conductor sites are masked and the two anodized films are selectively removed in the desired nonconductive areas. The remaining first level aluminum is completely anodized. An insulating layer is then deposited and vias are formed therethrough to connect a subsequently deposited second level metallization layer with the conductor sites.