Abstract: Methods, systems, and devices for link startup sequence (LSS) mode detection for memory systems are described. A memory system may determine a duration between signals associated with a LSS and may use the duration to determine whether the LSS is associated with a first speed mode or a second speed mode. In some examples, the memory system may perform the LSS in accordance with the determined speed mode in response to determining that the duration satisfies a threshold. Performing the LSS may involve initializing the memory system. Further, the memory system may initiate a timer in response to receiving a first signal and may stop the timer in response to receiving a second signal and determining that a channel has transitioned from a first state to a second state. The speed mode may be a low speed LSS mode or a high speed LSS mode.

Abstract: Methods, systems, and devices for data flush techniques for memory are described. For example, following a reset or initialization operation, the memory system may transfer control information from the non-volatile memory of the memory system to the working memory of the system to utilize in various operations. In some examples, while performing the operations associated with the control information, the control information may be updated. the memory system may then receive a hardware reset signal. In response to the hardware reset signal, the memory system may transfer the updated control information from the working memory to the non-volatile memory of the memory system so that the updated control information is available after the subsequent reset.

Abstract: Methods, systems, and devices for error information storage for boot-up procedures are described. A memory system may detect an error associated with performing the boot-up procedure of the memory system and may store error information associated with the detected error in a persistent register at the memory system. In some cases, the memory system may additionally store the error information in a cache at the memory system. After storing the error information, the memory system may reset and, after resetting, may transfer the error information from the persistent register to a non-volatile memory device at the memory system. In cases that the memory system stores error information in the cache prior to the reset, the memory system may additionally transfer the error information from the cache to the non-volatile memory device.

Abstract: Methods, systems, and devices for error information storage for boot-up procedures are described. A memory system may detect an error associated with performing the boot-up procedure of the memory system and may store error information associated with the detected error in a persistent register at the memory system. In some cases, the memory system may additionally store the error information in a cache at the memory system. After storing the error information, the memory system may reset and, after resetting, may transfer the error information from the persistent register to a non-volatile memory device at the memory system. In cases that the memory system stores error information in the cache prior to the reset, the memory system may additionally transfer the error information from the cache to the non-volatile memory device.

Abstract: Methods, systems, and devices for error information storage for boot-up procedures are described. A memory system may detect an error associated with performing the boot-up procedure of the memory system and may store error information associated with the detected error in a persistent register at the memory system. In some cases, the memory system may additionally store the error information in a cache at the memory system. After storing the error information, the memory system may reset and, after resetting, may transfer the error information from the persistent register to a non-volatile memory device at the memory system. In cases that the memory system stores error information in the cache prior to the reset, the memory system may additionally transfer the error information from the cache to the non-volatile memory device.