Abstract: A method for forming self-aligned contact devices in a core region of a semiconductor substrate and non-self-aligned contact devices in a non-core region of the semiconductor substrate is disclosed in which a single gate film stack is used for forming gate structures in both the core region and in the non-core region. A dielectric layer is formed over a semiconductor substrate and a gate film stack is formed over the dielectric layer. The gate film stack is then patterned so as to form gate structures within both the core region and the non-core region.

Abstract: The invented method involves separately etching the P and N gate features in a dual-poly gate using dual masks, thereby permitting the etching recipes to be tuned to the differentially responsive P and N materials that form the gate.