Abstract: A ball grid array device includes a substrate, further including a first major surface and a second major surface. An array of pads is positioned on one of the first major surface or the second major surface. At least some of the pads include a barrier layer having pores or openings therein. When solder is placed on the pad, the barrier layer forms an intermetallic compound at a rate different from the rate of the intermetallic compound formed between the pad and the solder. The result is a solder ball on a pad that has a first intermetallic compound and a second intermetallic compound.

Abstract: A method for forming a via in an integrated circuit packaging substrate includes embedding an interfacial adhesion layer at a base of a via, and heating the materials at the base of the via. Embedding the interfacial adhesion layer further includes placing a conductive material over the interfacial adhesion layer. An interfacial layer material is deposited within at the base of opening and a conductive material is placed over the interfacial material. The interfacial layer material is a material that will diffuse into the conductive material at the temperature produced by heating the materials at the base of the via opening. Heating the materials at the base of the via opening includes directing energy from a laser at the base of the opening. An integrated circuit packaging substrate includes a first layer of conductive material, and a second layer of conductive material.

Abstract: A method for forming a via in an integrated circuit packaging substrate includes embedding an interfacial adhesion layer at a base of a via, and heating the materials at the base of the via. Embedding the interfacial adhesion layer further includes placing a conductive material over the interfacial adhesion layer. An interfacial layer material is deposited within at the base of opening and a conductive material is placed over the interfacial material. The interfacial layer material is a material that will diffuse into the conductive material at the temperature produced by heating the materials at the base of the via opening. Heating the materials at the base of the via opening includes directing energy from a laser at the base of the opening. An integrated circuit packaging substrate includes a first layer of conductive material, and a second layer of conductive material.

Abstract: A substrate has at least one via-in-pad that includes a bond pad and a bore. In addition, the substrate has a plug coupled to the at least one via-in-pad, the plug has a first conductive material and adapted to couple with a solder ball having a second conductive material, the first conductive material having a higher reflow temperature than the second conductive material.

Abstract: Apparatus and methods providing for interconnecting a component to a substrate comprising one or more via-in-pad (VIP) interconnects is presented. In one embodiment in accordance with the invention, a first interconnect material is deposited on the VIP bond pad and into at least a portion of the VIP bore adjacent the bond pad. The substrate is subjected to a reflow process to form a plug of first reflowable interconnect material having a cap and a stem. The cap conforms to the bond pad and has a predetermined thickness and a diameter larger than the diameter of the bore. The stem conforms to the diameter of the bore and extends from the cap into the bore a predetermined distance. A component interconnect is coupled to the VIP bond pad and the cap using a second reflowable interconnect material having a reflow temperature lower than that of the first interconnect material. The plug remains in a solid form and effectively blocks the migration of the second reflowable interconnect material into the VIP bore.