Patents by Inventor Kum Sang Low

Kum Sang Low has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Low inductance integral capacitor assembly
    Patent number: 9336949
    Abstract: The invention provides an integral high-voltage capacitor assembly that yields very low self inductance and provides voltage and current multiplication. The capacitor assembly has two or four capacitors connected in series, with each capacitor made up of a stack of capacitor cells (40) also connected in series. Each of the capacitor cells (40) includes an arrangement of a pair of elongate foil electrodes (10) separated by dielectric (20, 30), and multiply-folded in a substantially flat, wound configuration. In the case of the two-capacitor assembly, in one embodiment the adjacent capacitor cells of the first capacitor (11) are connected in series by joining their foil electrodes on only one longitudinal side of the foil electrodes, while the adjacent capacitor cells of the second capacitor (12) are connected in series by joining their foil electrodes on both longitudinal sides of the foil electrodes.
    Type: Grant
    Filed: December 30, 2010
    Date of Patent: May 10, 2016
    Assignee: SPECSCAN SDN BHD
    Inventors: Kum Sang Low, Albert Kok Foo Ng, Chee Hoong Low, Kum Wan Low, David Mahadevan, Chin Yang Chia, Kean Phoe Cheong
  • LOW INDUCTANCE INTEGRAL CAPACITOR ASSEMBLY
    Publication number: 20130063859
    Abstract: The invention provides an integral high-voltage capacitor assembly that yields very low self inductance and provides voltage and current multiplication. The capacitor assembly has two or four capacitors connected in series, with each capacitor made up of a stack of capacitor cells (40) also connected in series. Each of the capacitor cells (40) includes an arrangement of a pair of elongate foil electrodes (10) separated by dielectric (20, 30), and multiply-folded in a substantially flat, wound configuration. In the case of the two-capacitor assembly, in one embodiment the adjacent capacitor cells of the first capacitor (11) are connected in series by joining their foil electrodes on only one longitudinal side of the foil electrodes, while the adjacent capacitor cells of the second capacitor (12) are connected in series by joining their foil electrodes on both longitudinal sides of the foil electrodes.
    Type: Application
    Filed: December 30, 2010
    Publication date: March 14, 2013
    Applicant: SPECSCAN SDN.BHD
    Inventors: Kum Sang Low, Albert Kok Foo Ng, Chee Hoong Low, Kum Wan Low, David Mahadevan, Chin Yang Chia, Kean Phoe Cheong