Abstract: A power converter system (100) comprises a power converter (102), an analyzing circuit (114) and a power converter controller (110). The power converter (102) receives a mains voltage (108) and provides power (104) to a signal processing circuit (106). The power converter (102) is configured for operating in either a first mode wherein the power converter (102) is able to supply a first power level, or in a second mode wherein the power converter (102) is able to supply a second power level. The second power level exceeds the first power level. The signal processing circuit (106) processes a signal (116) in a normal operational mode. The analyzing circuit (114) anlyzes the signal (116). The analyzing circuit (114) generates a power signal (112) that indicates a power consumption of the signal processing circuit (106) in normal operation. The power converter controller (110) receives the power signal (112) and controls the power converter (102) to operate in the first mode or in the second mode.

Abstract: The arrangement and the respective display unit comprise a microprocessor, a demagnetization circuit and a switched mode power supply operating in a normal mode and in a low power mode. The microprocessor is coupled via the same output to the switched mode power supply for controlling the low power mode and to the demagnetization circuit for controlling a demagnetization operation. In a preferred embodiment, the control signal from the microprocessor provides a control for a low power burst mode, and is further combined with a power on-indicative signal via a logical AND combination for controlling the demagnetization circuit.

Abstract: The arrangement and the respective display unit comprise a microprocessor, a demagnetization circuit and a switched mode power supply operating in a normal mode and in a low power mode. The microprocessor is coupled via the same output to the switched mode power supply for controlling the low power mode and to the demagnetization circuit for controlling a demagnetization operation. In a preferred embodiment, the control signal from the microprocessor provides a control for a low power burst mode, and is further combined with a power on-indicative signal via a logical AND combination for controlling the demagnetization circuit.

Abstract: The protection circuit comprises a clamping circuit with a switching element for reducing a supply voltage in case of an over voltage condition, and a holding circuit for providing a holding current for the clamping circuit. The clamping circuit comprises a threshold circuit, which provides a switching voltage for a switching element when the supply voltage reaches an upper voltage limit. The switching element is connected to a charge capacitor, which provides the switching-on voltage for the switching transistor, and by reducing this supply voltage, the switching of the switching transistor is disabled. The holding circuit comprises in particular a capacitor, which is coupled via a resistor to the clamping circuit for providing an additional current in case of an over voltage condition.

Abstract: A switched-mode power supply with a control loop and a microprocessor has a normal mode and a low-power mode with a burst mode. The microprocessor is connected via an output to the control loop and uses this to control the burst mode of the switched-mode power supply directly. The control loop of the switched-mode power supply monitors, in particular, a secondary output voltage, so that the output of the microprocessor is connected to the control loop, for example via a simple resistor network or a transistor stage. The clock frequency and the duty cycle of the burst mode are permanently stored in the microprocessor and can be defined for the switched-mode power supply directly, for example using TTL logic.

Abstract: The protection circuit comprises a clamping circuit with a switching element for reducing a supply voltage in case of a failure, especially in case of an overvoltage condition, and a holding circuit for providing a holding current for said clamping circuit. With the holding current the switch-off time in case of a failure is extended which avoids therefore an immediate start-up of the power supply when the supply voltage is reduced, and which would lead to a hiccup stage. The clamping circuit comprises a threshold circuit, which provides a switching voltage for the switching element when the supply voltage reaches an upper voltage limit. The switching element is connected to a charge capacitor which provides the switching-on voltage for the switching transistor, and by reducing this supply voltage the switching of the switching transistor is disabled.

Abstract: The protection circuit comprises a storage capacitor which is coupled with a terminal of a secondary winding which charges said storage capacitor during the on-interval of the switching transistor. During the off-interval of the switching transistor the charge of the storage capacitor is fed to the driver stage or the control capacitor for closing or keeping closed the switching transistor when one of the secondary windings has a short circuit.

Abstract: The invention is about a dc/dc converter (1) fitted with switching means (11, 12) having a drive electrode (13, 14) each drive electrode (13, 14) being connected to polarization means (49,50). The switching means are to switch on and off a current coming from a direct source of current 2 and circulating in windings (17, 18, 5) of transformers (6, 7) of the converter. The improvement according to the invention comprises a protection circuit 24 connected to means (44) for detecting the value of current circulating in one of the windings (4, 5, 15, 19, 23) of the transformers. Outputs (47, 48) of circuit 24 are connected to the drive electrode (13, 14) of switching means (11, 12). Protection circuit (24) may be a bistable circuit that will lower voltage at its outputs (47, 48) in a permanent way if detected current has been to high, thus switching off in a permanent way switching means (11, 12).