Patents by Inventor Kumar Anshumali

Kumar Anshumali has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Partially gated mux-latch keeper
    Publication number: 20070240094
    Abstract: Embodiments related to multiplexer latches (mux-latches) are presented herein.
    Type: Application
    Filed: March 31, 2006
    Publication date: October 11, 2007
    Inventors: Kumar Anshumali, Tom Fletcher
  • Addition of metal layers with signal reallocation to a microprocessor for increased frequency and lower power
    Patent number: 7138716
    Abstract: A semiconductor device and method of adding metal layers in a semiconductor device with signal reallocation are disclosed. The device has a first layer with a plurality of signal wires. A second layer adjacent to the first layer is also included that has a plurality of signal wires. The signal wires in the first and second layers are substantially parallel with each other. The signal wires are distributed between the first and second layer in a manner that reduces the wire capacitance and/or resistance thereby permitting higher frequency operation and lower power consumption in the device.
    Type: Grant
    Filed: June 27, 2003
    Date of Patent: November 21, 2006
    Assignee: Intel Corporation
    Inventors: Edward A. Burton, Kumar Anshumali
  • Data-enabled static flip-flop circuit with no extra forward-path delay penalty
    Patent number: 6864733
    Abstract: A logic circuit includes a data-enable controller for outputting a data value. When implemented as a master-slave flip-flop, a data enable signal controls the activation of a master stage of the flip-flop in conjunction with the transitioning edge of an input clock signal. The data enable signal also controls the feedback of a logical value stored in the slave stage to a storage node of the master stage. Operation of the slave stage may be controlled by the input clock signal only. Through this structural configuration, the flip-flop or latch outputs logical values without requiring any additional forward-path delay elements. As a result, these devices are faster and more efficient than conventional circuits.
    Type: Grant
    Filed: May 29, 2003
    Date of Patent: March 8, 2005
    Assignee: Intel Corporation
    Inventors: Kumar Anshumali, Tom Fletcher
  • Addition of metal layers with signal reallocation to a microprocessor for increased frequency and lower power
    Publication number: 20040262765
    Abstract: A semiconductor device and method of adding metal layers in a semiconductor device with signal reallocation are disclosed. The device has a first layer with a plurality of signal wires. A second layer adjacent to the first layer is also included that has a plurality of signal wires. The signal wires in the first and second layers are substantially parallel with each other. The signal wires are distributed between the first and second layer in a manner that reduces the wire capacitance and/or resistance thereby permitting higher frequency operation and lower power consumption in the device.
    Type: Application
    Filed: June 27, 2003
    Publication date: December 30, 2004
    Applicant: Intel Corporation
    Inventors: Edward A. Burton, Kumar Anshumali
  • Data-enabled static flip-flop circuit with no extra forward-path delay penalty
    Publication number: 20040239393
    Abstract: A logic circuit includes a data-enable controller for outputting a data value. When implemented as a master-slave flip-flop, a data enable signal controls the activation of a master stage of the flip-flop in conjunction with the transitioning edge of an input clock signal. The data enable signal also controls the feedback of a logical value stored in the slave stage to a storage node of the master stage. Operation of the slave stage may be controlled by the input clock signal only. Through this structural configuration, the flip-flop or latch outputs logical values without requiring any additional forward-path delay elements. As a result, these devices are faster and more efficient than conventional circuits.
    Type: Application
    Filed: May 29, 2003
    Publication date: December 2, 2004
    Applicant: Intel Corporation
    Inventors: Kumar Anshumali, Tom Fletcher