Patents by Inventor KUMAR DESAPPAN
KUMAR DESAPPAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12645921Abstract: A method for generating a sparsified convolutional neural network (CNN) is provided that includes training the CNN to generate coefficient values of filters of convolution layers, and performing sparsified fine tuning on the convolution layers to generate the sparsified CNN, wherein the sparsified fine tuning causes selected nonzero coefficient values of the filters to be set to zero.Type: GrantFiled: June 29, 2022Date of Patent: June 2, 2026Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Manu Mathew, Kumar Desappan, Pramod Kumar Swami
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Patent number: 12634479Abstract: Several methods and systems for masking multimedia data are disclosed. In an embodiment, a method for masking includes performing a prediction for at least one multimedia data block based on a prediction mode of a plurality of prediction modes. The at least one multimedia data block is associated with a region of interest (ROI). A residual multimedia data associated with the at least one multimedia data block is generated based on the prediction. A quantization of the residual multimedia data is performed based on a quantization parameter (QP) value. The QP value is variable such that varying the QP value controls a degree of masking of the ROI.Type: GrantFiled: June 21, 2024Date of Patent: May 19, 2026Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Yashwant Dutt, Kumar Desappan, Piyali Goswami
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Patent number: 12586153Abstract: Technology is disclosed herein to execute an inference model by a processor which includes a reshape layer. In an implementation, the reshape layer of the inference model receives an output produced by a previous layer of the inference model and inserts padding into the output, then supplies the padded output as an input to a next layer of the inference model. In an implementation, the inference model includes a stitching layer at the beginning of the inference model and an un-stitch layer at the end of the model. The stitching layer of the inference model stitches together multiple input images into an image batch and supplies the image batch as an input to a subsequent layer. The un-stitch layer receives output from a penultimate layer of the inference model and unstitches the output to produce multiple output images corresponding to the multiple input images.Type: GrantFiled: February 27, 2023Date of Patent: March 24, 2026Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Pramod Swami, Anshu Jain, Eppa Praveen Reddy, Kumar Desappan, Soyeb Nagori, Arthur Redfern
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Patent number: 12579213Abstract: In described examples, an integrated circuit includes a memory storing weights and biases, an N-bit fixed point matrix operations accelerator, and a processor. Starting with a first convolution layer, a convolution layer modeled using the processor receives input feature values. A feature scale and weight scale are reduced if an accumulator scale is greater than a maximum bias scale. The input feature values are rescaled using the feature scale, the weights are quantized using the weight scale, and the biases are quantized using the feature scale and weight scale. The rescaled input feature values and quantized weights and biases are convolved using the N-bit fixed point matrix operations accelerator to generate output feature values. The process repeats from the receive action using the output feature values as the input feature values of the next convolution layer. The process then repeats for all layers, feeding back an output feature range.Type: GrantFiled: November 17, 2021Date of Patent: March 17, 2026Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Anshu Jain, Manu Mathew, Kumar Desappan, Anand Anil Pathak
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Patent number: 12443447Abstract: Techniques for executing machine learning (ML) models including receiving an indication to run an ML model on a processing core; receiving a static memory allocation for running the ML model on the processing core; determining that a layer of the ML model uses more memory than the static memory allocated; transmitting, to a shared memory, a memory request for blocks of the shared memory; receiving an allocation of the requested blocks; running the layer of the ML model using the static memory and the range of memory addresses; and outputting results of running the layer of the ML model.Type: GrantFiled: May 28, 2024Date of Patent: October 14, 2025Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Mihir Narendra Mody, Kedar Satish Chitnis, Kumar Desappan, David Smith, Pramod Kumar Swami, Shyam Jagannathan
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Publication number: 20250045572Abstract: Disclosed herein are systems and methods for performing post training quantization. A processor obtains fixed-point output values from a layer of an artificial neural network (ANN) wherein the layer includes fixed-point weights determined based on floating-point weights and a weight scaling factor determined based on an output scaling factor. Next, the processor converts the fixed-point output values to floating-point output values based on the output scaling factor. Then, the processor expands a range of floating-point values. Next, the processor calculates a new output scaling factor based on the expanded range of floating-point output values. Finally, the processor stores the new output scaling factor in an associated memory.Type: ApplicationFiled: January 9, 2024Publication date: February 6, 2025Inventors: Varun Tripathi, Manu Mathew, Pramod Swami, Kumar Desappan
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Publication number: 20240394543Abstract: In an example, a method includes executing, using one or more processors, a power-of-2 parametric activation (PACT2) function to quantize a set of data. The executing of the PACT2 function includes determining a distribution for the set of data; discarding a portion of the data corresponding to a tail of the distribution to form a remaining set of data; estimating a maximum value of the remaining set of data; determining a new maximum value of the remaining set of data using a moving average and at least one historical value of at least one prior remaining set of data; determining a clipping value by expanding the new maximum value to a nearest power of two value; and quantizing the set of data using the clipping value to form a quantized set of data.Type: ApplicationFiled: August 6, 2024Publication date: November 28, 2024Inventors: Manu Mathew, Kumar Desappan, Soyeb Noormohammed Nagori, Debapriya Maji, Pramod Kumar Swami
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Publication number: 20240340430Abstract: Several methods and systems for masking multimedia data are disclosed. In an embodiment, a method for masking includes performing a prediction for at least one multimedia data block based on a prediction mode of a plurality of prediction modes. The at least one multimedia data block is associated with a region of interest (ROI). A residual multimedia data associated with the at least one multimedia data block is generated based on the prediction. A quantization of the residual multimedia data is performed based on a quantization parameter (QP) value. The QP value is variable such that varying the QP value controls a degree of masking of the ROI.Type: ApplicationFiled: June 21, 2024Publication date: October 10, 2024Inventors: Yashwant Dutt, Kumar Desappan, Piyali Goswami
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Publication number: 20240320045Abstract: Techniques for executing machine learning (ML) models including receiving an indication to run an ML model on a processing core; receiving a static memory allocation for running the ML model on the processing core; determining that a layer of the ML model uses more memory than the static memory allocated; transmitting, to a shared memory, a memory request for blocks of the shared memory; receiving an allocation of the requested blocks; running the layer of the ML model using the static memory and the range of memory addresses; and outputting results of running the layer of the ML model.Type: ApplicationFiled: May 28, 2024Publication date: September 26, 2024Inventors: Mihir Narendra MODY, Kedar Satish CHITNIS, Kumar DESAPPAN, David SMITH, Pramod Kumar SWAMI, Shyam JAGANNATHAN
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Patent number: 12099930Abstract: In described examples of a method for quantizing data for a convolutional neural network (CNN) is provided. A set of data is received and quantized the using a power-of-2 parametric activation (PACT2) function. The PACT2 function arranges the set of data as a histogram and discards a portion of the data corresponding to a tail of the histogram to form a remaining set of data. A clipping value is determined by expanding the remaining set of data to a nearest power of two value. The set of data is then quantized using the clipping value. With PACT2, a model can be quantized either using post training quantization or using quantization aware training. PACT2 helps a quantized model to achieve close accuracy compared to the corresponding floating-point model.Type: GrantFiled: December 10, 2020Date of Patent: September 24, 2024Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Manu Mathew, Kumar Desappan, Soyeb Noormohammed Nagori, Debapriya Maji, Pramod Kumar Swami
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Patent number: 12022093Abstract: Several methods and systems for masking multimedia data are disclosed. In an embodiment, a method for masking includes performing a prediction for at least one multimedia data block based on a prediction mode of a plurality of prediction modes. The at least one multimedia data block is associated with a region of interest (ROI). A residual multimedia data associated with the at least one multimedia data block is generated based on the prediction. A quantization of the residual multimedia data is performed based on a quantization parameter (QP) value. The QP value is variable such that varying the QP value controls a degree of masking of the ROI.Type: GrantFiled: May 30, 2022Date of Patent: June 25, 2024Assignee: Texas Instruments IncorporatedInventors: Yashwant Dutt, Kumar Desappan, Piyali Goswami
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Patent number: 11995472Abstract: Techniques for executing machine learning (ML) models including receiving an indication to run an ML model on a processing core; receiving a static memory allocation for running the ML model on the processing core; determining that a layer of the ML model uses more memory than the static memory allocated; transmitting, to a shared memory, a memory request for blocks of the shared memory; receiving an allocation of the requested blocks; running the layer of the ML model using the static memory and the range of memory addresses; and outputting results of running the layer of the ML model.Type: GrantFiled: July 19, 2021Date of Patent: May 28, 2024Assignee: Texas Instruments IncorporatedInventors: Mihir Narendra Mody, Kedar Satish Chitnis, Kumar Desappan, David Smith, Pramod Kumar Swami, Shyam Jagannathan
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Patent number: 11915117Abstract: A method for convolution in a convolutional neural network (CNN) is provided that includes accessing a coefficient value of a filter corresponding to an input feature map of a convolution layer of the CNN, and performing a block multiply accumulation operation on a block of data elements of the input feature map, the block of data elements corresponding to the coefficient value, wherein, for each data element of the block of data elements, a value of the data element is multiplied by the coefficient value and a result of the multiply is added to a corresponding data element in a corresponding output block of data elements comprised in an output feature map.Type: GrantFiled: May 24, 2021Date of Patent: February 27, 2024Assignee: Texas Instruments IncorporatedInventors: Manu Mathew, Kumar Desappan, Pramod Kumar Swami
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Publication number: 20240062059Abstract: Various examples disclosed herein relate to neural network quantization techniques, and more particularly, to selecting inference precisions for the layers of the neural network. In an example embodiment, a method is provided herein that includes determining an accuracy improvement of a layer of a neural network implemented using a first bit precision relative to using a second bit precision and determining a latency degradation of the layer of the neural network implemented using the first bit precision relative to using the second bit precision. The method further includes selecting, based on the accuracy improvement and the latency degradation, the first bit precision or the second bit precision for use in implementing the layer of the neural network.Type: ApplicationFiled: March 28, 2023Publication date: February 22, 2024Inventors: Manu Mathew, Anand Pathak, Anshu Jain, Kumar Desappan
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Publication number: 20240046413Abstract: Technology is disclosed herein to execute an inference model by a processor which includes a reshape layer. In an implementation, the reshape layer of the inference model receives an output produced by a previous layer of the inference model and inserts padding into the output, then supplies the padded output as an input to a next layer of the inference model. In an implementation, the inference model includes a stitching layer at the beginning of the inference model and an un-stitch layer at the end of the model. The stitching layer of the inference model stitches together multiple input images into an image batch and supplies the image batch as an input to a subsequent layer. The un-stitch layer receives output from a penultimate layer of the inference model and unstitches the output to produce multiple output images corresponding to the multiple input images.Type: ApplicationFiled: February 27, 2023Publication date: February 8, 2024Inventors: Pramod Swami, Anshu Jain, Eppa Praveen Reddy, Kumar Desappan, Soyeb Nagori, Arthur Redfern
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Publication number: 20240036816Abstract: Disclosed herein are systems and methods for determining the scaling factors for a neural network that satisfy the activation functions employed by the nodes of the network. A processor identifies a saturation point of an activation function. Next, the processor determines a scaling factor for an output feature map based on the saturation point of the activation function. Then, the processor determines a scaling factor for an accumulator based on the scaling for the output feature map and further based on a shift value related to a quantization. Finally, the processor determines a scaling factor for a weight map based on the scaling factor for the accumulator.Type: ApplicationFiled: March 30, 2023Publication date: February 1, 2024Inventors: Kumar Desappan, Anshu Jain, Manu Mathew
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Patent number: 11887346Abstract: An example image feature extraction system comprises an encoder neural network having a first set of layers and a decoder neural network having a second set of layers and a third set of layers. The encoder neural network receives an input image, processes the input image through the first set of layers, and computes an encoded feature map based on the input image. The decoder neural network receives the encoded feature map, processes the encoded feature map through the second set of layers to compute a keypoint score map, and processes the encoded feature map through at least a portion of the third set of layers to compute a feature description map.Type: GrantFiled: March 1, 2023Date of Patent: January 30, 2024Assignee: Texas Instruments IncorporatedInventors: Deepak Kumar Poddar, Soyeb Nagori, Hrushikesh Tukaram Garud, Kumar Desappan
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Patent number: 11748599Abstract: Techniques including receiving a first set of values for processing by a machine learning (ML) network, storing a first portion of the first set of values in an on-chip memory, processing the first portion of the first set of values in a first layer of the ML network to generate a second portion of a second set of values, overwriting the stored first portion with the generated second portion, processing the second portion in a second layer of the ML network to generate a third portion of a third set of values, storing the third portion, repeating the steps of storing the first portion, processing the first portion, overwriting the stored first portion, processing the second portion, and storing the third portion for a fourth portion of the first set of values until all portions of the first set of values are processed to generate the third set of values.Type: GrantFiled: February 21, 2020Date of Patent: September 5, 2023Assignee: Texas Instruments IncorporatedInventors: Kumar Desappan, Mihir Narendra Mody, Pramod Kumar Swami, Anshu Jain, Rishabh Garg
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Publication number: 20230252328Abstract: Disclosed herein are systems and methods for inference model scheduling of a multi priority inference model system. A processor determines an interrupt flag has been set indicative of a request to interrupt execution of a first inference model in favor of a second inference model. In response to determining that the interrupt flag has been set, the processor determines a state of the execution of the first inference model based on one or more factors. In response to determining the state of the execution is at a preemptable boundary, the processor deactivates the first inference model and activates the second inference model.Type: ApplicationFiled: January 12, 2023Publication date: August 10, 2023Inventors: Pramod Swami, Eppa Praveen Reddy, Jesse Villarreal, Kumar Desappan
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Publication number: 20230206604Abstract: An example image feature extraction system comprises an encoder neural network having a first set of layers and a decoder neural network having a second set of layers and a third set of layers. The encoder neural network receives an input image, processes the input image through the first set of layers, and computes an encoded feature map based on the input image. The decoder neural network receives the encoded feature map, processes the encoded feature map through the second set of layers to compute a keypoint score map, and processes the encoded feature map through at least a portion of the third set of layers to compute a feature description map.Type: ApplicationFiled: March 1, 2023Publication date: June 29, 2023Inventors: DEEPAK KUMAR PODDAR, SOYEB NAGORI, HRUSHIKESH TUKARAM GARUD, KUMAR DESAPPAN