Abstract: A memory cell of a non-volatile memory includes a control gate oxide layer having graded portions with greatly reduced stress on a polysilicon floating gate layer. The method of making the control gate oxide layer preferably includes growing a first oxide portion by upwardly ramping the polysilicon floating gate layer to a first temperature lower than a glass transition temperature, and exposing the polysilicon floating gate layer to an oxidizing ambient at the first temperature and for a first time period. Also, the method includes growing a second oxide portion between the first oxide portion and the polysilicon floating gate layer by exposing the polysilicon floating gate layer to an oxidizing ambient at a second temperature higher than the glass transition temperature for a second time period. The second oxide portion may have a thickness in a range of about 25 to 75% of a total thickness of the graded, grown, control gate oxide layer.

Abstract: A memory cell of a non-volatile memory includes a tunnel oxide layer having graded portions with greatly reduced stress on a silicon substrate. The method of making the tunnel oxide preferably includes growing a first oxide portion by upwardly ramping the silicon substrate to a first temperature lower than a glass transition temperature, and exposing the silicon substrate to an oxidizing ambient at the first temperature and for a first time period. Also, the method includes growing a second oxide portion between the first oxide portion and the silicon substrate by exposing the silicon substrate to an oxidizing ambient at a second temperature higher than the glass transition temperature for a second time period. The second oxide portion may have a thickness in a range of about 2 to 50% of a total thickness of the graded, grown, tunnel oxide layer.

Abstract: A bipolar transistor includes an oxide layer having graded portions with greatly reduced stress on a silicon substrate. The method of making the oxide preferably includes growing a first oxide portion by upwardly ramping the silicon substrate to a first temperature lower than a glass transition temperature, and exposing the silicon substrate to an oxidizing ambient at the first temperature and for a first time period. Also, the method includes growing a second oxide portion between the first oxide portion and the silicon substrate by exposing the silicon substrate to an oxidizing ambient at a second temperature higher than the glass transition temperature for a second time period. The second oxide portion may have a thickness in a range of about 2 to 75% of a total thickness of the graded, grown, oxide layer. The step of upwardly ramping preferably includes upwardly ramping the temperature at a relatively high ramping rate to reduce any oxide formed during the upward ramping.