Patents by Inventor Kumar Singh

Kumar Singh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11574851
    Abstract: An apparatus is provided which comprises: a package substrate, an integrated circuit device coupled to a surface of the package substrate, a first material on the surface of the package substrate, the first material contacting one or more lateral sides of the integrated circuit device, the first material extending at least to a surface of the integrated circuit device opposite the package substrate, two or more separate fins over a surface of the integrated circuit device, the two or more fins comprising a second material having a different composition than the first material, and a third material having a different composition than the second material, the third material over the surface of the integrated circuit device and between the two or more fins. Other embodiments are also disclosed and claimed.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: February 7, 2023
    Assignee: Intel Corporation
    Inventors: Aastha Uppal, Omkar Karhade, Ram Viswanath, Je-Young Chang, Weihua Tang, Nitin Deshpande, Mitul Modi, Edvin Cetegen, Sanka Ganesan, Yiqun Bai, Jan Krajniak, Kumar Singh
  • Publication number: 20200273768
    Abstract: IC packages including a heat spreading material comprising crystalline carbon. The heat spreading material may be applied directly to an IC die surface, for example at a die prep stage, prior to an application or build-up of packaging material, so that the high thermal conductivity may best mitigate any hot spots that develop at the IC die surface during operation. The heat spreading material may be applied to surface of the IC die.
    Type: Application
    Filed: February 27, 2019
    Publication date: August 27, 2020
    Applicant: Intel Corporation
    Inventors: Omkar Karhade, Nitin Deshpande, Mitul Modi, Edvin Cetegen, Aastha Uppal, Debendra Mallik, Sanka Ganesan, Yiqun Bai, Jan Krajniak, Kumar Singh
  • Publication number: 20200273811
    Abstract: IC package including a material preform comprising graphite. The material preform may have a thermal conductivity higher than that of other materials in the package and may therefore mitigate the formation of hot spots within an IC die during device operation. The preform may have high electrical conductivity suitable for EMI shielding. The preform may comprise a graphite sheet that can be adhered to a package assembly with an electrically conductive adhesive, applied, for example over an IC die surface and a surrounding package dielectric material. Electrical interconnects of the package may be coupled to the graphite sheet as an EMI shield. The package preform may be grounded to a reference potential through electrical interconnects of the package, which may be further coupled to a system-level ground plane. System-level thermal solutions may interface with the package-level graphite sheet.
    Type: Application
    Filed: February 27, 2019
    Publication date: August 27, 2020
    Applicant: Intel Corporation
    Inventors: Debendra Mallik, Mitul Modi, Sanka Ganesan, Edvin Cetegen, Omkar Karhade, Ravindranath Mahajan, James C. Matayabas, Jr., Jan Krajniak, Kumar Singh, Aastha Uppal
  • Publication number: 20200273772
    Abstract: An apparatus is provided which comprises: a package substrate, an integrated circuit device coupled to a surface of the package substrate, a first material on the surface of the package substrate, the first material contacting one or more lateral sides of the integrated circuit device, the first material extending at least to a surface of the integrated circuit device opposite the package substrate, two or more separate fins over a surface of the integrated circuit device, the two or more fins comprising a second material having a different composition than the first material, and a third material having a different composition than the second material, the third material over the surface of the integrated circuit device and between the two or more fins. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: February 27, 2019
    Publication date: August 27, 2020
    Applicant: Intel Corporation
    Inventors: Aastha Uppal, Omkar Karhade, Ram Viswanath, Je-Young Chang, Weihua Tang, Nitin Deshpande, Mitul Modi, Edvin Cetegen, Sanka Ganesan, Yiqun Bai, Jan Krajniak, Kumar Singh
  • Publication number: 20070078143
    Abstract: Ziprasidone is a known agent for treating various disorders including schizophrenia, migraine pain and anxiety. The present invention provides a method for preparing 5-(2-(4-1,2-benzisothiazol-3-yl)piperazinyl)ethyl)-6-chloro-1,3-dihydro-2H-indol-2-one (Ziprasidone) monohydrochloride-hydrate or a pharmaceutically acceptable acid addition salt thereof.
    Type: Application
    Filed: May 26, 2006
    Publication date: April 5, 2007
    Inventors: Siddiqui Jaweed Mukarram, Aravind Merwade, Kumar Singh, Pawan Solanki
  • Publication number: 20070047579
    Abstract: A multipacket interface is easily adaptable to any of several link layer interfaces via a simple adaptation layer which can be provided on an ASIC or FPGA. The interface according to the invention includes (in both transmit and receive directions) a multi-bit data signal, a multi-bit channel identifier, a packet abort/error signal, a start-of-frame signal, an end-of-frame signal, a data valid signal, and an interface clock. In the transmit direction, the interface also includes a data request signal and a multi-bit PDU length indicator signal. In the receive direction the interface also includes a server signal failure signal.
    Type: Application
    Filed: August 23, 2005
    Publication date: March 1, 2007
    Inventors: Suvhasis Mukhopadhyay, Santanu Bhattacharya, Vikas Kumar, Kumar Singh, Arunava Dutta, Desikan Srinivasan
  • Publication number: 20060039416
    Abstract: Time multiplexed processing of multiple SONET signals uses the same shared circuitry for framing, descrambling, maintenance signal processing, control byte processing and extraction, pointer tracking, retiming, and alarm indication. The signals are deserialized and multiplexed onto a byte-wide bus from which they are processed in a shared pipeline. Additional pipelines allow scaling up to higher capacity SONET signals. Each pipeline is provided with means for communicating with the other pipelines so that information derived from the processing of one stream can be shared with the processing of other streams when necessary. According to the presently preferred embodiment, bytes pass through the pipeline in five clock cycles.
    Type: Application
    Filed: August 23, 2005
    Publication date: February 23, 2006
    Inventors: Pushkal Yadav, Kumar Singh, Chitra Wadhwa, Sachin Mathur, Ashis Maitra, Amandeep Gujral, Diljit Singh
  • Publication number: 20050209457
    Abstract: An process for the preparation of pyridine and/or picolines is disclosed. The process comprises contacting a mixture of carbonyl compound with ammonia in the presence of surface-passivated titanium-silicate catalyst in gas phase at a temperature ranging between 300-500° C., at gas space velocity in the range of 300 to 3000 h?1 and at a pressure ranging between 1 to 10 atmosphere, condensing and separating the products by conventional methods and if desired, further purifying the product using well known conventional methods.
    Type: Application
    Filed: March 22, 2004
    Publication date: September 22, 2005
    Inventors: Rajiv Kumar, Praphulla Joshi, Gopal Chaphekar, Prashant Niphadkar, Ashutosh Agarwal, Pradeep Verma, Kumar Singh
  • Publication number: 20050131235
    Abstract: The present invention relates to a single step new catalytic process for the production of pyridine and picolines from a mixture of carbonyl compound and ammonia in the presence of zeolite catalyst with MFI topology containing Si and Zr and/or Sn as zeolite constituents in gas phase. The catalyst is preferably loaded with other metal ions such as lead, nickel, thallium or their mixture for increased yield. Present invention provides the novel use of above mentioned zeolite catalysts for the production of picolines for the first time, with improved yield of desired products picolines.
    Type: Application
    Filed: December 10, 2003
    Publication date: June 16, 2005
    Applicants: COUNCIL OF SCIENTIFIC AND INDUSTRIAL RESEARCH, JUBILANT ORGANOSYS LIMITED
    Inventors: Ashutosh Agarwal, Pradeep Verma, Kumar Singh, Praphulla Joshi, Gopal Chaphekar, Prashant Niphadkar, Rajiv Kumar