Abstract: Exemplary substrate processing systems may include a chamber body defining a transfer region. The systems may include a first lid plate seated on the chamber body. The first lid plate may define a plurality of apertures through the first lid plate. The systems may include a plurality of lid stacks equal to a number of the plurality of apertures. The systems may define a plurality of isolators. An isolator may be positioned between each lid stack and a corresponding aperture of the plurality of apertures. The systems may include a plurality of annular spacers. An annular spacer of the plurality of annular spacers may be positioned between each isolator and a corresponding lid stack of the plurality of lids stacks. The systems may include a plurality of manifolds. A manifold may be seated within an interior of each annular spacer of the plurality of annular spacers.

Abstract: Structures for a silicon-controlled rectifier and methods of forming a structure for a silicon-controlled rectifier. The structure comprises a first well and a second well in a semiconductor substrate, a first terminal including a first doped region in the first well, and a second terminal including a second doped region in the second well. The first well, the second well and the first doped region have a first conductivity type, and the second doped region has a second conductivity type opposite to the first conductivity type. The structure further comprises a deep well in the semiconductor substrate. The deep well has the second conductivity type, the first well is positioned in a vertical direction between the deep well and the top surface of the semiconductor substrate, and the second well is positioned in the vertical direction between the deep well and the top surface of the semiconductor substrate.

Abstract: A water management system effective for managing and metering water usage and detecting and reducing water leaks is described herein. The water management system can detect a leak when a volume of water flow or change in water pressure detected by a water meter of the system is uncharacteristic for a given day and time of day at the node. Upon detecting the leak, the system alerts the user, and in some situations, remotely shuts off a water supply to preemptively address a water leakage issue.

Abstract: A water management system effective for managing and metering water usage and detecting and reducing water leaks is described herein. The water management system can detect a leak when a volume of water flow or change in water pressure detected by a water meter of the system is uncharacteristic for a given day and time of day at the node. Upon detecting the leak, the system alerts the user, and in some situations, remotely shuts off a water supply to preemptively address a water leakage issue.

Abstract: The present invention is directed to the use of an edge computing architecture to track water usage data, forecast leaks and anomalies related to water in a plumbing system and compile billing information related to said water usage data. The present invention features a water usage tracking system comprising sensors, local computing system, an edge computing system, and a cloud computing system. Sensors may collect raw data at a high frequency and transmit the raw data to the local computing system. The local computing system may receive raw data from the sensors, process the raw data, and transmit and receive decision making data from the edge computing system. The edge computing system may comprise edge servers for collecting and compiling data from local computing systems. The cloud computing system may comprise receiving and deploying a global model to the edge computing system, and tweaking the global model based on feedback.

Abstract: A double edge triggered circuit includes a clock gater responsive to a clock signal and an enable signal to output a gated clock signal, a first double edge triggered flip-flop that launches a data signal in response to the gated clock signal, and a second double edge triggered flip-flop that captures the data signal in response to the clock signal, wherein the clock gater stops the gated clock signal at a first logic value when the enable signal is at a first logic state, and the clock gater switches the gated clock signal from the first logic value at a next clock edge when the enable signal is at a second logic state.

Abstract: A double edge triggered circuit includes a clock gater responsive to a clock signal and an enable signal to output a gated clock signal, a first double edge triggered flip-flop that launches a data signal in response to the gated clock signal, and a second double edge triggered flip-flop that captures the data signal in response to the clock signal, wherein the clock gater stops the gated clock signal at a first logic value when the enable signal is at a first logic state, and the clock gater switches the gated clock signal from the first logic value at a next clock edge when the enable signal is at a second logic state.