Patents by Inventor Kumar Vemuri
Kumar Vemuri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250158605Abstract: In some examples, a circuit includes a capacitor having a first terminal and a second terminal, the first terminal coupled to a voltage supply terminal of the circuit. The circuit also includes a transistor having a transistor gate, a transistor drain, and a transistor source, the transistor source coupled to ground and the transistor drain coupled to an input terminal of the circuit. The transistor is configured to conduct responsive to a gate signal received at the transistor gate, the gate signal based on a signal provided at the second terminal of the capacitor. The circuit also includes a Schmitt trigger having a Schmitt trigger input coupled to the transistor drain.Type: ApplicationFiled: January 16, 2025Publication date: May 15, 2025Inventors: Kyoung Min Lee, Satish Kumar Vemuri, Zhidong Liu, Maxim James Franke, Kory Andrew McCarthy
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Patent number: 12237836Abstract: In some examples, a circuit includes a capacitor having a first terminal and a second terminal, the first terminal coupled to a voltage supply terminal of the circuit. The circuit also includes a transistor having a transistor gate, a transistor drain, and a transistor source, the transistor source coupled to ground and the transistor drain coupled to an input terminal of the circuit. The transistor is configured to conduct responsive to a gate signal received at the transistor gate, the gate signal based on a signal provided at the second terminal of the capacitor. The circuit also includes a Schmitt trigger having a Schmitt trigger input coupled to the transistor drain.Type: GrantFiled: March 31, 2022Date of Patent: February 25, 2025Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Kyoung Min Lee, Satish Kumar Vemuri, Zhidong Liu, Maxim James Franke, Kory Andrew McCarthy
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Patent number: 12176899Abstract: Techniques are described herein to enhance capability of floating level translators. For example, increased headroom is accomplished by adaptively bypassing the protection elements of the voltage level translator. In an example, a floating level translator can translate an input signal from a low-voltage domain to a high-voltage domain. A bypass circuit is coupled across the protection elements. The bypass circuit selectively engages during low-voltage operation (e.g., thereby providing a lower loss path relative to loss caused by the high-voltage protection elements and thus increasing the headroom swing), and disengages responsive to the high-voltage reference rail of the high-voltage domain exceeding a threshold or otherwise being high enough (e.g., greater than the potential of the low-voltage domain power rail). The bypass circuit can be implemented in a relatively low-complexity manner (e.g., back-to-back high-voltage FETs) without additional signals to control low-voltage capability.Type: GrantFiled: November 13, 2023Date of Patent: December 24, 2024Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Tuli Luthuli Dake, Satish Kumar Vemuri
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Publication number: 20240403667Abstract: Application prototyping systems and methods are disclosed. One aspect is a processing method for multiple computing devices that includes identifying resource constraints for the multiple computing devices. Using identified resource constraints, a presentation model having a plurality of modifiable parameters based at least in part based on the resource constraints is created. At least one inference engine supporting neural network processing is used to execute a particular neural network model based at least in part on the presentation model.Type: ApplicationFiled: May 30, 2023Publication date: December 5, 2024Inventors: Abhilash Bharath Ghanore, Suresh Lakshmi Goduguluru, Rajashekar Reddy Ereddy, Sreenivas Aerra Reddy, Satya Uppalapati, Lava Kumar Bokam, Siva Kumar Vemuri, Arindam Chakraborty, Snigdha Alkanti, Davyansh Agrawal, Amit Pandey
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Publication number: 20240403668Abstract: Application prototyping systems and methods are disclosed. One aspect is a processing method for multiple computing devices that includes identifying resource constraints for the multiple computing devices. Using identified resource constraints, multiple presentation models at least in part based on identified processing metrics are created. In one aspect, the multiple presentation models include multiple processing pipelines configurable for execution on multiple computing devices. An inference engine can be used to provide an execution model for the multiple processing pipelines based at least in part on the multiple presentation models, with the execution model having improved processing metrics as compared to at least one of the multiple presentation models.Type: ApplicationFiled: May 30, 2023Publication date: December 5, 2024Inventors: Abhilash Bharath Ghanore, Suresh Lakshmi Goduguluru, Rajashekar Reddy Ereddy, Sreenivas Aerra Reddy, Satya Uppalapati, Lava Kumar Bokam, Siva Kumar Vemuri, Arindam Chakraborty, Snigdha Alkanti, Divyansh Agrawal, Amit Pandey
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Patent number: 12081134Abstract: Disclosed examples include flyback converters, control circuits and methods to facilitate secondary side regulation of the output voltage. A primary side control circuit operates a primary side switch to independently initiate power transfer cycles to deliver power to a transformer secondary winding in a first mode. A secondary side control circuit operates a synchronous rectifier or secondary side switch to generate a predetermined cycle start request signal via a transformer auxiliary winding to assume secondary side regulation and to cause the primary side controller to initiate new power transfer cycles.Type: GrantFiled: June 19, 2023Date of Patent: September 3, 2024Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Satish Kumar Vemuri, James M. Walden, Isaac Cohen
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Publication number: 20240080028Abstract: Techniques are described herein to enhance capability of floating level translators. For example, increased headroom is accomplished by adaptively bypassing the protection elements of the voltage level translator. In an example, a floating level translator can translate an input signal from a low-voltage domain to a high-voltage domain. A bypass circuit is coupled across the protection elements. The bypass circuit selectively engages during low-voltage operation (e.g., thereby providing a lower loss path relative to loss caused by the high-voltage protection elements and thus increasing the headroom swing), and disengages responsive to the high-voltage reference rail of the high-voltage domain exceeding a threshold or otherwise being high enough (e.g., greater than the potential of the low-voltage domain power rail). The bypass circuit can be implemented in a relatively low-complexity manner (e.g., back-to-back high-voltage FETs) without additional signals to control low-voltage capability.Type: ApplicationFiled: November 13, 2023Publication date: March 7, 2024Inventors: Tuli Luthuli Dake, Satish Kumar Vemuri
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Patent number: 11878717Abstract: In an approach to mirage detection by autonomous vehicles, one or more computer processors monitor road conditions of a road on which an autonomous vehicle is traveling. One or more computer processors detect a visual indication of a water accumulation on the road. One or more computer processors determine whether one or more other vehicles are detected on the road ahead of the autonomous vehicle. Responsive to determining the one or more other vehicles are detected, one or more computer processors request information associated with road conditions of the road ahead of the autonomous vehicle from the one or more other vehicles. Based on a response to the request from the one or more other vehicles, one or more computer processors determine the one or more other vehicles did not detect the water accumulation. One or more computer processors determine the visual indication of the water accumulation is a mirage.Type: GrantFiled: January 24, 2022Date of Patent: January 23, 2024Assignee: International Business Machines CorporationInventors: Saraswathi Sailaja Perumalla, Sarbajit K. Rakshit, Venkatrama Siva Kumar Vemuri, Ravi Sankar Parvathina
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Patent number: 11855630Abstract: Techniques are described herein to enhance capability of floating level translators. For example, increased headroom is accomplished by adaptively bypassing the protection elements of the voltage level translator. In an example, a floating level translator can translate an input signal from a low-voltage domain to a high-voltage domain. A bypass circuit is coupled across the protection elements. The bypass circuit selectively engages during low-voltage operation (e.g., thereby providing a lower loss path relative to loss caused by the high-voltage protection elements and thus increasing the headroom swing), and disengages responsive to the high-voltage reference rail of the high-voltage domain exceeding a threshold or otherwise being high enough (e.g., greater than the potential of the low-voltage domain power rail). The bypass circuit can be implemented in a relatively low-complexity manner (e.g., back-to-back high-voltage FETs) without additional signals to control low-voltage capability.Type: GrantFiled: May 31, 2022Date of Patent: December 26, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Tuli Luthuli Dake, Satish Kumar Vemuri
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Publication number: 20230387916Abstract: Techniques are described herein to enhance capability of floating level translators. For example, increased headroom is accomplished by adaptively bypassing the protection elements of the voltage level translator. In an example, a floating level translator can translate an input signal from a low-voltage domain to a high-voltage domain. A bypass circuit is coupled across the protection elements. The bypass circuit selectively engages during low-voltage operation (e.g., thereby providing a lower loss path relative to loss caused by the high-voltage protection elements and thus increasing the headroom swing), and disengages responsive to the high-voltage reference rail of the high-voltage domain exceeding a threshold or otherwise being high enough (e.g., greater than the potential of the low-voltage domain power rail). The bypass circuit can be implemented in a relatively low-complexity manner (e.g., back-to-back high-voltage FETs) without additional signals to control low-voltage capability.Type: ApplicationFiled: May 31, 2022Publication date: November 30, 2023Inventors: Tuli Luthuli Dake, Satish Kumar Vemuri
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Publication number: 20230336089Abstract: Disclosed examples include flyback converters, control circuits and methods to facilitate secondary side regulation of the output voltage. A primary side control circuit operates a primary side switch to independently initiate power transfer cycles to deliver power to a transformer secondary winding in a first mode. A secondary side control circuit operates a synchronous rectifier or secondary side switch to generate a predetermined cycle start request signal via a transformer auxiliary winding to assume secondary side regulation and to cause the primary side controller to initiate new power transfer cycles.Type: ApplicationFiled: June 19, 2023Publication date: October 19, 2023Inventors: Satish Kumar Vemuri, James M. Walden, Isaac Cohen
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Publication number: 20230318588Abstract: In some examples, a circuit includes a capacitor having a first terminal and a second terminal, the first terminal coupled to a voltage supply terminal of the circuit. The circuit also includes a transistor having a transistor gate, a transistor drain, and a transistor source, the transistor source coupled to ground and the transistor drain coupled to an input terminal of the circuit. The transistor is configured to conduct responsive to a gate signal received at the transistor gate, the gate signal based on a signal provided at the second terminal of the capacitor. The circuit also includes a Schmitt trigger having a Schmitt trigger input coupled to the transistor drain.Type: ApplicationFiled: March 31, 2022Publication date: October 5, 2023Inventors: Kyoung Min LEE, Satish Kumar VEMURI, Zhidong LIU, Maxim James FRANKE, Kory Andrew McCARTHY
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Publication number: 20230304688Abstract: A processor may receive an air dataset associated with a smart environment having one or more storage objects. The processor may simulate the smart environment using the air dataset. The processor may apply an optimization criteria to the simulation of the smart environment. The processor may generate an optimum smart environment design associated with an improved air condition level of the smart environment and the optimization criteria.Type: ApplicationFiled: March 28, 2022Publication date: September 28, 2023Inventors: Venkata Vara Prasad Karri, Sri Harsha Varada, Sarbajit K. Rakshit, Venkatrama Siva Kumar Vemuri
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Publication number: 20230249710Abstract: In an approach to mirage detection by autonomous vehicles, one or more computer processors monitor road conditions of a road on which an autonomous vehicle is traveling. One or more computer processors detect a visual indication of a water accumulation on the road. One or more computer processors determine whether one or more other vehicles are detected on the road ahead of the autonomous vehicle. Responsive to determining the one or more other vehicles are detected, one or more computer processors request information associated with road conditions of the road ahead of the autonomous vehicle from the one or more other vehicles. Based on a response to the request from the one or more other vehicles, one or more computer processors determine the one or more other vehicles did not detect the water accumulation. One or more computer processors determine the visual indication of the water accumulation is a mirage.Type: ApplicationFiled: January 24, 2022Publication date: August 10, 2023Inventors: Saraswathi Sailaja Perumalla, Sarbajit K. Rakshit, Venkatrama Siva Kumar Vemuri, Ravi Sankar Parvathina
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Patent number: 11722067Abstract: Disclosed examples include flyback converters, control circuits and methods to facilitate secondary side regulation of the output voltage. A primary side control circuit operates a primary side switch to independently initiate power transfer cycles to deliver power to a transformer secondary winding in a first mode. A secondary side control circuit operates a synchronous rectifier or secondary side switch to generate a predetermined cycle start request signal via a transformer auxiliary winding to assume secondary side regulation and to cause the primary side controller to initiate new power transfer cycles.Type: GrantFiled: May 23, 2018Date of Patent: August 8, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Satish Kumar Vemuri, James M. Walden, Isaac Cohen
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Publication number: 20230239691Abstract: Aspects of the disclosure relate to a multi-mode wireless access protocol (MMWAP). A redirection router may receive a pre-association request, from a user communication device, and send an acknowledgment of the pre-association request. The user communication device may further transmit authorization keys associated with an application installed in the user communication device. Based on the authorization keys, the redirection router may send an authentication indication to the user communication device. The user communication device may use the redirection router to transmit and receive messages associated with the application to public networks and other private networks. The redirection router may maintain multi-mode connectivity independently with multiple user communication devices.Type: ApplicationFiled: March 29, 2023Publication date: July 27, 2023Inventors: Yash Pant Dashputra, Tirupathirao Madiya, Kiran Kumar Vemuri, Yellaiah Ponnarneni
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Patent number: 11659388Abstract: Aspects of the disclosure relate to a multi-mode wireless access protocol (MMWAP). A redirection router may receive a pre-association request, from a user communication device, and send an acknowledgment of the pre-association request. The user communication device may further transmit authorization keys associated with an application installed in the user communication device. Based on the authorization keys, the redirection router may send an authentication indication to the user communication device. The user communication device may use the redirection router to transmit and receive messages associated with the application to public networks and other private networks. The redirection router may maintain multi-mode connectivity independently with multiple user communication devices.Type: GrantFiled: March 10, 2021Date of Patent: May 23, 2023Assignee: Bank of America CorporationInventors: Yash Pant Dashputra, Tirupathirao Madiya, Kiran Kumar Vemuri, Yellaiah Ponnameni
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Patent number: 11569808Abstract: An apparatus includes a differential input pair, a first resistor, a second resistor, and a comparator. The differential input pair having first and second differential inputs. The first differential input is adapted to be coupled to an output of a controller and the second differential input is adapted to be coupled to a signal ground of the controller. The first resistor is adapted to be coupled to a third resistor via the first differential input to form a first voltage divider. The second resistor is adapted to be coupled to a fourth resistor via the second differential input to form a second voltage divider. The comparator having first and second comparator inputs. The first comparator input is coupled between the first resistor and the first differential input. The second comparator input is coupled between the second resistor and the second differential input.Type: GrantFiled: October 29, 2021Date of Patent: January 31, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Tuli Luthuli Dake, Satish Kumar Vemuri, Ritesh Jitendra Oza, Laszlo Balogh
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Patent number: 11342911Abstract: Gate driver bootstrap circuits and related methods are disclosed. An example gate driver stage includes a first terminal and a second terminal, the first terminal to be coupled to a capacitor, the capacitor and the second terminal to be coupled to a gate terminal of a power transistor, a gate driver coupled to the first terminal and the second terminal, and a bootstrap circuit coupled to the first terminal, the second terminal, and the gate driver, the bootstrap circuit including a control stage circuit having an output and a first transistor having a first gate terminal and a first current terminal, the first gate terminal coupled to the output, the first current terminal coupled to the first terminal.Type: GrantFiled: February 26, 2020Date of Patent: May 24, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Kyoung Min Lee, Satish Kumar Vemuri, James Michael Walden
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Publication number: 20220140823Abstract: An apparatus includes a differential input pair, a first resistor, a second resistor, and a comparator. The differential input pair having first and second differential inputs. The first differential input is adapted to be coupled to an output of a controller and the second differential input is adapted to be coupled to a signal ground of the controller. The first resistor is adapted to be coupled to a third resistor via the first differential input to form a first voltage divider. The second resistor is adapted to be coupled to a fourth resistor via the second differential input to form a second voltage divider. The comparator having first and second comparator inputs. The first comparator input is coupled between the first resistor and the first differential input. The second comparator input is coupled between the second resistor and the second differential input.Type: ApplicationFiled: October 29, 2021Publication date: May 5, 2022Inventors: Tuli Luthuli DAKE, Satish Kumar VEMURI, Ritesh Jitendra OZA, Laszlo BALOGH