Patents by Inventor Kumiko Teramae
Kumiko Teramae has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10445460Abstract: A via model generation method includes: acquiring via arrangement information including a hole diameter of a via formed in a board including a plurality of wiring layers, a clearance distance between a ground conductor formed in one wiring layer of the plurality of wiring layers and the via, and a ground via distance between the via and a ground via coupled to the ground conductor; acquiring board information including a relative dielectric constant of the board; calculating a capacitance component of the via by a first electromagnetic field analysis using the hole diameter of the via, the clearance distance, and the relative dielectric constant of the board; calculating an inductance component of the via by a second electromagnetic field analysis using the hole diameter of the via, the ground via distance, and the relative dielectric constant of the board; and generating a via model including the capacitance and inductance components.Type: GrantFiled: November 20, 2017Date of Patent: October 15, 2019Assignee: FUJITSU LIMITEDInventors: Kumiko Teramae, Hikoyuki Kawata, Takashi Fukuda, Megumi Tanaka
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Patent number: 10120966Abstract: An information processing device include: a memory; and one or more processors which are coupled to the memory, wherein the one or more processors performs a process including verifying a quality of a signal waveform that is propagated through focused wiring on a substrate; and storing information which is used for the verification of the quality of the signal waveform, and wherein the verifying includes determining a relative permittivity of the substrate in a division position of a variation range of the relative permittivity of the substrate such that a variation range of a propagation delay time of the signal waveform corresponding to the variation range of the relative permittivity of the substrate is divided at even intervals; generating an analysis model corresponding to the relative permittivity of the substrate in the determined division position; and performing waveform analysis on the signal waveform using the generated analysis model.Type: GrantFiled: March 31, 2016Date of Patent: November 6, 2018Assignee: FUJITSU LIMITEDInventors: Hikoyuki Kawata, Masaki Tosaka, Kumiko Teramae
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Publication number: 20180150593Abstract: A via model generation method includes: acquiring via arrangement information including a hole diameter of a via formed in a board including wiring layers, clearance distance between a ground conductor formed in one of the wiring layers and the via, and ground via distance between the via and a ground via coupled to the ground conductor; acquiring, by a computer, board information including a relative dielectric constant of the board; calculating a capacitance component of the via by a first electromagnetic field analysis with use of the hole diameter of the via, the clearance distance, and the relative dielectric constant of the board; calculating an inductance component of the via by a second electromagnetic field analysis with use of the hole diameter of the via, the ground via distance, and the relative dielectric constant of the board; and generating a via model including the capacitance component and the inductance component.Type: ApplicationFiled: November 20, 2017Publication date: May 31, 2018Applicant: FUJITSU LIMITEDInventors: Kumiko TERAMAE, Hikoyuki Kawata, TAKASHI FUKUDA, Megumi Tanaka
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Patent number: 9928325Abstract: An information processing device includes a memory; and one or more processors which are coupled to the memory and configured to performs a process including verifying a quality of a signal waveform that is propagated through focused wiring on a substrate, and storing information which is used for the verification of the quality of the signal waveform, and wherein the verifying includes generating analysis models of a plurality of respective combinations of variations in a plurality of kinds of elements which have an influence on the quality of the signal waveform; calculating impulse-response-waveforms of the plurality of respective combinations using the generated analysis models; calculating the noise amount of the plurality of respective combinations based on the calculated impulse-response-waveforms; selecting a combination, in which the calculated noise amount is the largest, as a worst case in the plurality of combinations; and performing signal waveform-transition-analysis on the selected worst case.Type: GrantFiled: April 20, 2016Date of Patent: March 27, 2018Assignee: FUJITSU LIMITEDInventors: Hikoyuki Kawata, Masaki Tosaka, Kumiko Teramae
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Publication number: 20160335382Abstract: An information processing device includes a memory; and one or more processors which are coupled to the memory and configured to performs a process including verifying a quality of a signal waveform that is propagated through focused wiring on a substrate, and storing information which is used for the verification of the quality of the signal waveform, and wherein the verifying includes generating analysis models of a plurality of respective combinations of variations in a plurality of kinds of elements which have an influence on the quality of the signal waveform; calculating impulse-response-waveforms of the plurality of respective combinations using the generated analysis models; calculating the noise amount of the plurality of respective combinations based on the calculated impulse-response-waveforms; selecting a combination, in which the calculated noise amount is the largest, as a worst case in the plurality of combinations; and performing signal waveform-transition-analysis on the selected worst case.Type: ApplicationFiled: April 20, 2016Publication date: November 17, 2016Applicant: FUJITSU LIMITEDInventors: Hikoyuki KAWATA, Masaki Tosaka, Kumiko Teramae
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Publication number: 20160334460Abstract: An information processing device include: a memory; and one or more processors which are coupled to the memory, wherein the one or more processors performs a process including verifying a quality of a signal waveform that is propagated through focused wiring on a substrate; and storing information which is used for the verification of the quality of the signal waveform, and wherein the verifying includes determining a relative permittivity of the substrate in a division position of a variation range of the relative permittivity of the substrate such that a variation range of a propagation delay time of the signal waveform corresponding to the variation range of the relative permittivity of the substrate is divided at even intervals; generating an analysis model corresponding to the relative permittivity of the substrate in the determined division position; and performing waveform analysis on the signal waveform using the generated analysis model.Type: ApplicationFiled: March 31, 2016Publication date: November 17, 2016Applicant: FUJITSU LIMITEDInventors: Hikoyuki Kawata, Masaki TOSAKA, Kumiko TERAMAE
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Patent number: 9389254Abstract: A computer-readable-recording-medium stored a program for causing a computer to execute: judging, for each of elements of a plurality of scattering parameters, whether a difference between a first-area in a plane containing an axis representing frequency and an axis representing the element, and a second-area in the plane is within a permissible range, the first-area being surrounded by a first-element-value series of the element that is defined in advance for a plurality of first-frequencies, the second-area being surrounded by a second-element-value series that is obtained by performing interpolation calculation from the first-element-value series for a plurality of second frequencies which are different from the plurality of first-frequencies and which are provided at regular intervals; and determining, by performing the judging for one interval or a plurality of intervals, an interval so that the difference falls within the permissible range for all of the elements of the plurality of scattering parameterType: GrantFiled: April 26, 2013Date of Patent: July 12, 2016Assignee: FUJITSU LIMITEDInventors: Kumiko Teramae, Yoshiyuki Iwakura, Tsunaki Iwasaki
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Patent number: 8768677Abstract: A coupled analysis simulation apparatus includes a coupled analysis processing unit configured to perform coupled analysis by performing electromagnetic field analysis and circuit analysis in coordination with each other, the electromagnetic field analysis being performed on a space including conductive layers to which an electronic circuit module is connected, the circuit analysis being performed on the electronic circuit module; a first generating unit configured to generate a virtual conductive part in a section or a region including connection parts connecting the electronic circuit module with the conductive layers; and a second generating unit configured to generate virtual connection parts that virtually connect the virtual conductive part with the conductive layers at positions where the connection parts are connected to the conductive layers.Type: GrantFiled: October 6, 2010Date of Patent: July 1, 2014Assignee: Fujitsu LimitedInventors: Kumiko Teramae, Atsushi Takeuchi
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Publication number: 20130332097Abstract: A computer-readable-recording-medium stored a program for causing a computer to execute: judging, for each of elements of a plurality of scattering parameters, whether a difference between a first-area in a plane containing an axis representing frequency and an axis representing the element, and a second-area in the plane is within a permissible range, the first-area being surrounded by a first-element-value series of the element that is defined in advance for a plurality of first-frequencies, the second-area being surrounded by a second-element-value series that is obtained by performing interpolation calculation from the first-element-value series for a plurality of second frequencies which are different from the plurality of first-frequencies and which are provided at regular intervals; and determining, by performing the judging for one interval or a plurality of intervals, an interval so that the difference falls within the permissible range for all of the elements of the plurality of scattering parameterType: ApplicationFiled: April 26, 2013Publication date: December 12, 2013Applicant: FUJITSU LIMITEDInventors: Kumiko TERAMAE, Yoshiyuki Iwakura, Tsunaki Iwasaki
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Patent number: 8396702Abstract: An analyzing apparatus includes a result-data storing unit that determines whether result data that is calculated as a result of analysis is restorable by linear interpolation. If the result data is determined to be unrestorable by the linear interpolation, the result-data storing unit stores the result data in a predetermined storage unit. Moreover, the analyzing apparatus includes a data restoring unit that reads the result data from the storage unit. The data restoring unit performs the linear interpolation using the result data acquired, thereby restoring the result data.Type: GrantFiled: September 29, 2009Date of Patent: March 12, 2013Assignee: Fujitsu LimitedInventors: Kenji Nagase, Eiji Ohta, Yuji Suwa, Toshiro Sato, Atsushi Takeuchi, Kumiko Teramae
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Publication number: 20110082681Abstract: A coupled analysis simulation apparatus includes a coupled analysis processing unit configured to perform coupled analysis by performing electromagnetic field analysis and circuit analysis in coordination with each other, the electromagnetic field analysis being performed on a space including conductive layers to which an electronic circuit module is connected, the circuit analysis being performed on the electronic circuit module; a first generating unit configured to generate a virtual conductive part in a section or a region including connection parts connecting the electronic circuit module with the conductive layers; and a second generating unit configured to generate virtual connection parts that virtually connect the virtual conductive part with the conductive layers at positions where the connection parts are connected to the conductive layers.Type: ApplicationFiled: October 6, 2010Publication date: April 7, 2011Applicant: FUJITSU LIMITEDInventors: Kumiko TERAMAE, Atsushi Takeuchi
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Publication number: 20100088566Abstract: An analyzing apparatus includes a result-data storing unit that determines whether result data that is calculated as a result of analysis is restorable by linear interpolation. If the result data is determined to be unrestorable by the linear interpolation, the result-data storing unit stores the result data in a predetermined storage unit. Moreover, the analyzing apparatus includes a data restoring unit that reads the result data from the storage unit. The data restoring unit performs the linear interpolation using the result data acquired, thereby restoring the result data.Type: ApplicationFiled: September 29, 2009Publication date: April 8, 2010Applicant: FUJITSU LIMITEDInventors: Kenji NAGASE, Eiji OHTA, Yuji SUWA, Toshiro SATO, Atsushi TAKEUCHI, Kumiko TERAMAE