Patents by Inventor Kun-Cheng Huang

Kun-Cheng Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180025621
    Abstract: A fast responding surveillance system with low power consumption and a low false alarm rate is provided. An alarm is issued through a button or a sensor to request a microcontroller to activate an image capturing module to capture at least one alarm image, and a first low-power RF module is activated to transmit the alarm image to an intelligent analysis module for analysis to generate a determination result. When the determination result indicates a false alarm, the alarm image is discarded, and the first low-power RF module and the image capturing module are turned off. When the determination result indicates a valid alarm, the image capturing module captures a high-quality video, a first video transmission module is activated to transmit the high-quality video, and the first low-power RF module is turned off.
    Type: Application
    Filed: September 27, 2016
    Publication date: January 25, 2018
    Inventors: YUNG-HSIANG HUANG, KUN-CHENG HUANG
  • Patent number: 7545045
    Abstract: A dummy via design for a dual damascene structure has a dielectric layer on a substrate, a dual damascene structure filled with a conductive material and inlaid in the dielectric layer, and a dummy via structure filled with a non-conductive material and inlaid in the dielectric layer. The dummy via structure has at least two dummy vias filled with the non-conductive material and located adjacent to two sides of the dual damascene structure respectively.
    Type: Grant
    Filed: March 24, 2005
    Date of Patent: June 9, 2009
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kun-Cheng Huang, Huan-Chi Tseng, Jhy-Chen You, Kuan-Miao Liu, Tsong-Yuan Chen, Chih-Yang Wang, Tin-Lin Tsai, Ssu-Chia Huang
  • Publication number: 20060214298
    Abstract: A dummy via design for a dual damascene structure has a dielectric layer on a substrate, a dual damascene structure filled with a conductive material and inlaid in the dielectric layer, and a dummy via structure filled with a non-conductive material and inlaid in the dielectric layer. The dummy via structure has at least two dummy vias filled with the non-conductive material and located adjacent to two sides of the dual damascene structure respectively.
    Type: Application
    Filed: March 24, 2005
    Publication date: September 28, 2006
    Inventors: Kun-Cheng Huang, H. Tseng, Jc You, K. Liu, T. Chen, C. Wang, Tin-Lin Tsai, Ssu-Chia Huang