Patents by Inventor Kun Chuai

Kun Chuai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • INTEGRATED TRANSIMPEDANCE AMPLIFIER WITH A DIGITAL SIGNAL PROCESSOR FOR HIGH-SPEED OPTICAL RECEIVERS
    Publication number: 20240154591
    Abstract: An optical module includes an optical receiver with a complementary metal-oxide semiconductor (CMOS) transimpedance amplifier (TIA) and a digital signal processing (DSP) circuit. The DSP circuit is integrated with the CMOS TIA and facilitates adaptability of the CMOS TIA, and the CMOS TIA can adapt by using information provided by the DSP circuit.
    Type: Application
    Filed: June 15, 2023
    Publication date: May 9, 2024
    Applicant: Avago Technologies International Sales Pte. Limited
    Inventors: Jiawen Zhang, Delong Cui, Afshin Momtaz, Kun Chuai, Jun Cao
  • Integrated transimpedance amplifier with a digital signal processor for high-speed optical receivers
    Patent number: 11722109
    Abstract: An optical module includes an optical receiver with a complementary metal-oxide semiconductor (CMOS) transimpedance amplifier (TIA) and a digital signal processing (DSP) circuit. The DSP circuit is integrated with the CMOS TIA and facilitates adaptability of the CMOS TIA, and the CMOS TIA can adapt by using information provided by the DSP circuit.
    Type: Grant
    Filed: November 3, 2022
    Date of Patent: August 8, 2023
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Jiawen Zhang, Delong Cui, Afshin Momtaz, Kun Chuai, Jun Cao
  • Pre-driver peaking technique for high-speed DACs
    Patent number: 10476516
    Abstract: A pre-driver circuit includes a differential input circuit to receive a differential-input voltage. A latch circuit can latch voltage levels of output-voltage signals at a differential output port of the pre-driver circuit. A pair of capacitors couple the differential input circuit to the latch circuit. The pre-driver circuit can enable peaking of the output-voltage signals for high-speed operation of the pre-driver circuit and a digital-to-analog converter (DAC)-driver circuit coupled to the pre-driver circuit.
    Type: Grant
    Filed: October 17, 2018
    Date of Patent: November 12, 2019
    Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED
    Inventors: Kun Chuai, Afshin Momtaz, Jun Cao, Seong-Ho Lee, Burak Catli, Anand J. Vasani, Ali Nazemi
  • High speed serial input/output bus voltage mode driver with tunable amplitude and resistance
    Patent number: 8618843
    Abstract: A device having a voltage mode driver with tunable amplitude and resistance that supports a predetermined output resistance and output amplitude is described herein. The voltage mode driver includes multiple configurable drivers. The voltage mode driver is controlled by a control module. Resistance tuning is controlled by the number of active configurable drivers and amplitude tuning is controlled by setting the high or low drive state of each active configurable driver. The slew rate of the device is controlled by delaying the setting of the high or low drive state of an active configurable driver by a predetermined interval.
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: December 31, 2013
    Assignee: ATI Technologies ULC
    Inventors: Stephen S. Y. Liu, Kun Chuai, Bo Wang, Paul Edelshteyn, Kristina H. Y. Au
  • HIGH SPEED SERIAL INPUT/OUTPUT BUS VOLTAGE MODE DRIVER WITH TUNABLE AMPLITUDE AND RESISTANCE
    Publication number: 20130162300
    Abstract: A device having a voltage mode driver with tunable amplitude and resistance that supports a predetermined output resistance and output amplitude is described herein. The voltage mode driver includes multiple configurable drivers. The voltage mode driver is controlled by a control module. Resistance tuning is controlled by the number of active configurable drivers and amplitude tuning is controlled by setting the high or low drive state of each active configurable driver. The slew rate of the device is controlled by delaying the setting of the high or low drive state of an active configurable driver by a predetermined interval.
    Type: Application
    Filed: December 21, 2011
    Publication date: June 27, 2013
    Applicant: ATI TECHNOLOGIES ULC
    Inventors: Stephen S.Y. Liu, Kun Chuai, Bo Wang, Paul Edelshteyn, Kristina H.Y. Au