Abstract: A method for application management is provided. First, an original application is received. A license code is injected into the original application through a repackaging process to generate a repackaged application. Next, the repackaged application is published for a user device to download and install, wherein the user device executes a client program. When the user device executes the repackaged application, the license code sends a license check request to activate the client program to send a license check response according to license information of the repackaged application. The license check response indicates whether the repackaged application is allowed to be further executed. When the license check response indicates that the repackage application is not allowed to be further executed, the license code terminates the repackaged application.

Abstract: A light emitting diode includes a substrate, a first semiconductor layer, a luminous layer, a second semiconductor layer, a current diffusion layer, a third semiconductor layer, a first electrode, a second electrode, and an insulation layer. The first semiconductor layer is formed above the substrate. The luminous layer is formed on the first semiconductor layer, and exposes a portion of the first semiconductor layer. The second semiconductor layer is formed on the luminous layer. The current diffusion layer is formed on the second semiconductor layer. The third semiconductor layer is formed on the current diffusion layer. The first electrode is formed on the first semiconductor layer. The second electrode includes a base portion formed on the surface of the substrate, and plural comb structures extending upward vertically. Each tip of the comb structure is in the third semiconductor layer. The insulation layer exposes the tip of each comb structure.

Abstract: A light emitting diode includes a substrate, a first semiconductor layer, a luminous layer, a second semiconductor layer, a current diffusion layer, a third semiconductor layer, a first electrode, a second electrode, and an insulation layer. The first semiconductor layer is formed above the substrate. The luminous layer is formed on the first semiconductor layer, and exposes a portion of the first semiconductor layer. The second semiconductor layer is formed on the luminous layer. The current diffusion layer is formed on the second semiconductor layer. The third semiconductor layer is formed on the current diffusion layer. The first electrode is formed on the first semiconductor layer. The second electrode includes a base portion formed on the surface of the substrate, and plural comb structures extending upward vertically. Each tip of the comb structure is in the third semiconductor layer. The insulation layer exposes the tip of each comb structure.

Abstract: A method for application management is provided. First, an original application is received. A license code is injected into the original application through a repackaging process to generate a repackaged application. Next, the repackaged application is published for a user device to download and install, wherein the user device executes a client program. When the user device executes the repackaged application, the license code sends a license check request to activate the client program to send a license check response according to license information of the repackaged application. The license check response indicates whether the repackaged application is allowed to be further executed. When the license check response indicates that the repackage application is not allowed to be further executed, the license code terminates the repackaged application.

Abstract: A light emitting diode, comprising a light emitting diode (LED) cell, a dielectric layer and a metal layer is provided. The LED cell has a top surface, a bottom surface, a first lateral surface and a second lateral surface. The bottom surface is opposite to the top surface. The second lateral surface is opposite to the first lateral surface. An electrode layer is disposed on the top surface. The dielectric layer is disposed on the bottom surface, the first lateral surface and the second lateral surface. The metal layer is disposed on the dielectric layer and electrically insulated from the electrode layer.

Abstract: A light-emitting diode chip structure including a conductive substrate, a semiconductor stacking layer and a patterned seed crystal layer is provided. The conductive substrate has a surface. The surface has a first region and a second region alternately distributed over the surface. The semiconductor stacking layer is disposed on the conductive substrate, and the surface of the conductive substrate faces the semiconductor stacking layer. The patterned seed crystal layer is disposed on the first region of the surface of the conductive substrate and between the conductive substrate and the semiconductor stacking layer. The patterned seed crystal layer separates the semiconductor stacking layer from the first region. The semiconductor stacking layer covers the patterned seed crystal layer and the second region, and is electrically connected to the conductive substrate through the second region. A fabrication method of the light-emitting diode chip structure is also provided.

Abstract: A high bright LED comprises a substrate, a conductive layer, a first semiconductor layer, a luminous layer, a second semiconductor layer, a first electrode, a second electrode and an insulation structure. The conductive layer, the first semiconductor layer, the luminous layer and the second semiconductor layer are disposed upwards from an upper solder layer of the substrate in order. The first electrode is electrically connected to the conductive layer The second electrode penetrates through the conductive layer, the first semiconductor layer and the luminous layer to make the upper solder and the second semiconductor layer electrically connected. The insulation structure comprises at least two passivation layers peripherally wrapping the second electrode. The thicknesses of the at least two passivation layers are conformed to the distributed Bragg reflection technique to make the passivation layers jointly used as a reflector with high reflectance.

Abstract: A light-emitting diode chip structure including a conductive substrate, a semiconductor stacking layer and a patterned seed crystal layer is provided. The conductive substrate has a surface. The surface has a first region and a second region alternately distributed over the surface. The semiconductor stacking layer is disposed on the conductive substrate, and the surface of the conductive substrate faces the semiconductor stacking layer. The patterned seed crystal layer is disposed on the first region of the surface of the conductive substrate and between the conductive substrate and the semiconductor stacking layer. The patterned seed crystal layer separates the semiconductor stacking layer from the first region. The semiconductor stacking layer covers the patterned seed crystal layer and the second region, and is electrically connected to the conductive substrate through the second region. A fabrication method of the light-emitting diode chip structure is also provided.

Abstract: A fuel cell MEA with a border packaging structure. A catalyst coated membrane includes an anode catalyst layer, a cathode catalyst layer, and a proton exchange membrane disposed therebetween. An anode border packaging member is connected between the anode catalyst layer and an anode gas diffusion layer. A cathode border packaging member is connected between the cathode catalyst layer and a cathode gas diffusion layer and adheres to the anode border packaging member at outer edges of the catalyst coated membrane. The anode border packaging member and the cathode border packaging member respectively include two adhesive layers and a substrate layer formed therebetween. The anode border packaging member and the cathode border packaging member are respectively connected between the anode catalyst layer and the anode gas diffusion layer and between the cathode catalyst layer and the cathode gas diffusion layer by the adhesive layers.

Abstract: A bottom-gate thin film transistor includes a gate electrode, a gate insulating layer and a microcrystalline silicon layer. The gate electrode is disposed on a substrate. The gate insulating layer is made up of silicon nitride and disposed on the gate electrode and the substrate. The microcrystalline silicon layer is disposed on the gate insulating layer and corresponds to the gate electrode, in which a contact interface between the gate insulating layer and the microcrystalline silicon layer has a plurality of oxygen atoms, and concentration of the oxygen atoms ranges between 1020 atoms/cm3 and 1025 atoms/cm3. A method of fabricating a bottom-gate thin film transistor is also disclosed herein.

Abstract: A fabrication method of light emitting diode is provided. A first type doped semiconductor layer is formed on a substrate. Subsequently, a light emitting layer is formed on the first type doped semiconductor layer. A process for forming the light emitting layer includes alternately forming a plurality of barrier layers and a plurality of quantum well layers on the first type doped semiconductor layer. The quantum well layers are formed at a growth temperature T1, and the barrier layers are formed at a growth temperature T2, where T1<T2. Then, a second type doped semiconductor layer is formed on the light emitting layer.

Abstract: A semiconductor wafer includes a substrate, a first separating structure and a semiconductor stacked layer structure. The substrate has a first surface. The first separating structure is formed on the first surface to divide the first surface into a plurality of independent regions. The minimum area of each of the regions is more than or equal to one square inch. The semiconductor stacked layer structure is disposed on the first surface and the first separating structure. The semiconductor wafer can prevent bowing of the semiconductor wafer during an epitaxial growth process so as to enhance quality of the semiconductor wafer.

Abstract: A bottom-gate thin film transistor includes a gate electrode, a gate insulating layer and a microcrystalline silicon layer. The gate electrode is disposed on a substrate. The gate insulating layer is made up of silicon nitride and disposed on the gate electrode and the substrate. The microcrystalline silicon layer is disposed on the gate insulating layer and corresponds to the gate electrode, in which a contact interface between the gate insulating layer and the microcrystalline silicon layer has a plurality of oxygen atoms, and concentration of the oxygen atoms ranges between 1020 atoms/cm3 and 1025 atoms/cm3. A method of fabricating a bottom-gate thin film transistor is also disclosed herein.

Abstract: A fabrication method of light emitting diode is provided. A first type doped semiconductor layer is formed on a substrate. Subsequently, a light emitting layer is formed on the first type doped semiconductor layer. A process for forming the light emitting layer includes alternately forming a plurality of barrier layers and a plurality of quantum well layers on the first type doped semiconductor layer. The quantum well layers are formed at a growth temperature T1, and the barrier layers are formed at a growth temperature T2, where T1<T2. Then, a second type doped semiconductor layer is formed on the light emitting layer.

Abstract: A bottom-gate thin film transistor includes a gate electrode, a gate insulating layer and a microcrystalline silicon layer. The gate electrode is disposed on a substrate. The gate insulating layer is made up of silicon nitride and disposed on the gate electrode and the substrate. The microcrystalline silicon layer is disposed on the gate insulating layer and corresponds to the gate electrode, in which a contact interface between the gate insulating layer and the microcrystalline silicon layer has a plurality of oxygen atoms, and concentration of the oxygen atoms ranges between 1020 atoms/cm3 and 1025 atoms/cm3. A method of fabricating a bottom-gate thin film transistor is also disclosed herein.

Abstract: A bottom-gate thin film transistor includes a gate electrode, a gate insulating layer and a microcrystalline silicon layer. The gate electrode is disposed on a substrate. The gate insulating layer is made up of silicon nitride and disposed on the gate electrode and the substrate. The microcrystalline silicon layer is disposed on the gate insulating layer and corresponds to the gate electrode, in which a contact interface between the gate insulating layer and the microcrystalline silicon layer has a plurality of oxygen atoms, and concentration of the oxygen atoms ranges between 1020 atoms/cm3 and 1025 atoms/cm3. A method of fabricating a bottom-gate thin film transistor is also disclosed herein.

Abstract: The energy content of supercapacitor is determined by its capacitance value and working voltage. To attain a high capacitance and a high voltage, several pieces of electrodes and separators are spirally wound with edge sealing to form a bipolar supercapacitor in cylindrical, oval or square configuration. While the winding operation effectively provides a large surface area for high capacitance, the bipolar packaging instantly imparts a unitary roll a minimum working voltage of 5V on using an organic electrolyte. The bipolar roll is a powerful building block for facilitating the assembly of supercapacitor modules. Using containers with multiple compartments, as many bipolar rolls can be connected in series, in parallel or in a combination of the two connections to fabricate integrated supercapacitors with high energy density as required by applications.