Patents by Inventor Kun-Han Lin

Kun-Han Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11942542
    Abstract: A semiconductor device includes a substrate, a gate dielectric layer, a gate electrode, a field plate, a source electrode and a drain electrode. The gate dielectric layer is disposed on the substrate and includes a first portion having a first thickness, a second portion having a second thickness, and a third portion having a third thickness. The first, second and third thicknesses are different from each other, and the first thickness is smaller than the second and third thicknesses. The gate electrode is disposed on the first portion of the gate dielectric layer. The field plate is separated from and electrically coupled to the gate electrode, and is disposed on the second and third portions of the gate dielectric layer. The source and drain electrodes are disposed on the sides of the gate electrode and the field plate, respectively.
    Type: Grant
    Filed: September 29, 2021
    Date of Patent: March 26, 2024
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Syed-Sarwar Imam, Chia-Hao Lee, Chih-Hung Lin, Kun-Han Lin
  • Publication number: 20230100115
    Abstract: A semiconductor device includes a substrate, a gate dielectric layer, a gate electrode, a field plate, a source electrode and a drain electrode. The gate dielectric layer is disposed on the substrate and includes a first portion having a first thickness, a second portion having a second thickness, and a third portion having a third thickness. The first, second and third thicknesses are different from each other, and the first thickness is smaller than the second and third thicknesses. The gate electrode is disposed on the first portion of the gate dielectric layer. The field plate is separated from and electrically coupled to the gate electrode, and is disposed on the second and third portions of the gate dielectric layer. The source and drain electrodes are disposed on the sides of the gate electrode and the field plate, respectively.
    Type: Application
    Filed: September 29, 2021
    Publication date: March 30, 2023
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Syed-Sarwar Imam, Chia-Hao Lee, Chih-Hung Lin, Kun-Han Lin