Patents by Inventor Kun-Hsien Chou

Kun-Hsien Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240120419
    Abstract: A lateral diffusion metal-oxide semiconductor (LDMOS) device includes a first gate structure and a second gate structure extending along a first direction on a substrate, a first source region extending along the first direction on one side of the first gate structure, a second source region extending along the first direction on one side of the second gate structure, a drain region extending along the first direction between the first gate structure and the second gate structure, a guard ring surrounding the first gate structure and the second gate structure, and a shallow trench isolation (STI) surrounding the guard ring.
    Type: Application
    Filed: December 5, 2023
    Publication date: April 11, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Ling-Chun Chou, Yu-Hung Chang, Kun-Hsien Lee
  • Publication number: 20240105839
    Abstract: A lateral diffusion metal-oxide semiconductor (LDMOS) device includes a first gate structure and a second gate structure extending along a first direction on a substrate, a first source region extending along the first direction on one side of the first gate structure, a second source region extending along the first direction on one side of the second gate structure, a drain region extending along the first direction between the first gate structure and the second gate structure, a guard ring surrounding the first gate structure and the second gate structure, and a shallow trench isolation (STI) surrounding the guard ring.
    Type: Application
    Filed: December 5, 2023
    Publication date: March 28, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Ling-Chun Chou, Yu-Hung Chang, Kun-Hsien Lee
  • Patent number: 11455498
    Abstract: A model training method and an electronic device are provided. The method includes the following steps: establishing a brain age prediction model according to a training set; adjusting a parameter in the brain age prediction model according to a validation set; inputting a test set into the brain age prediction model with the adjusted parameter to obtain a plurality of first predicted brain ages; determining whether the first predicted brain ages satisfy a first specific condition; and completing training of the brain age prediction model when the first predicted brain ages satisfy the first specific condition.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: September 27, 2022
    Assignees: Acer Incorporated, National Yang-Ming University
    Inventors: Cheng-Tien Hsieh, Chun-Hsien Yu, Shih-Ho Huang, Meng-Che Cheng, Kun-Hsien Chou, Ching-Po Lin, Liang-Kung Chen
  • Publication number: 20210216826
    Abstract: A model training method and an electronic device are provided. The method includes the following steps: establishing a brain age prediction model according to a training set; adjusting a parameter in the brain age prediction model according to a validation set; inputting a test set into the brain age prediction model with the adjusted parameter to obtain a plurality of first predicted brain ages; determining whether the first predicted brain ages satisfy a first specific condition; and completing training of the brain age prediction model when the first predicted brain ages satisfy the first specific condition.
    Type: Application
    Filed: March 27, 2020
    Publication date: July 15, 2021
    Applicants: Acer Incorporated, National Yang-Ming University
    Inventors: Cheng-Tien Hsieh, Chun-Hsien Yu, Shih-Ho Huang, Meng-Che Cheng, Kun-Hsien Chou, Ching-Po Lin, Liang-Kung Chen