Abstract: Disclosed are a transaction card and an information displaying method. The transaction card includes a card body, a power supply, a graphic code generation circuit, and a display device. The power supply, the graphic code generation circuit, and the display device are embedded within the card body. The power supply is connected to the graphic code generation circuit and the display device. The graphic code generation circuit is configured to generate a graphic transaction code based on transaction account information of a user. The display device is configured to display the graphic transaction code.

Abstract: Disclosed are a transaction card and an information displaying method. The transaction card includes a card body, a power supply, a graphic code generation circuit, and a display device. The power supply, the graphic code generation circuit, and the display device are embedded within the card body. The power supply is connected to the graphic code generation circuit and the display device. The graphic code generation circuit is configured to generate a graphic transaction code based on transaction account information of a user. The display device is configured to display the graphic transaction code.

Abstract: A pass gate circuit includes a first transistor coupled between an input node (receiving an input signal) and an output node (outputting an output signal). A second transistor is configured to generate a voltage difference in response to a bias current flowing therethrough, wherein that voltage difference is applied between a first gate of the first transistor and the output node. A differential amplifier functions to compare the voltage at the output node to a reference voltage and generate the bias current in response to that comparison.

Abstract: A pass gate circuit includes a first transistor coupled between an input node (receiving an input signal) and an output node (outputting an output signal). A second transistor is configured to generate a voltage difference in response to a bias current flowing therethrough, wherein that voltage difference is applied between a first gate of the first transistor and the output node. A differential amplifier functions to compare the voltage at the output node to a reference voltage and generate the bias current in response to that comparison.

Abstract: A tunable, linear operational transconductance amplifier includes a differential voltage to current conversion unit adapted to generate first and second output signals at respective first and second output nodes responsive to first and second differential input signals. A first current amplification unit is adapted to generate a third output signal responsive to the first output signal and first and second control signals. A second current amplification unit is adapted to generate a fourth output signal responsive to the second output signal and the first and second control signals.

Abstract: A tunable, linear operational transconductance amplifier includes a differential voltage to current conversion unit adapted to generate first and second output signals at respective first and second output nodes responsive to first and second differential input signals. A first current amplification unit is adapted to generate a third output signal responsive to the first output signal and first and second control signals. A second current amplification unit is adapted to generate a fourth output signal responsive to the second output signal and the first and second control signals.