Abstract: An inrush voltage clamping circuit for an electronic device for clamping an inrush voltage induced by hot plugging is disclosed. The clamp circuit includes a buffer unit and a clamp unit. The buffer unit is coupled to an input power end for receiving an inrush current of the inrush voltage. The clamp unit is coupled to the input power end and the buffer unit for controlling the buffer unit to receive the inrush current according to an input voltage of the input power end.

Abstract: A motor driving method for driving a direct-current (DC) motor, designed for avoiding a reverse current induced by the Back Electromotive Force (BEMF), includes providing a driver circuit for driving the DC motor; comparing a signal level of a terminal of the DC motor and a predetermined voltage value to produce a comparing result; and controlling a specific lower gate switch to avoid the occurrence of a reverse current of the DC motor according to the comparing result.

Abstract: A driving method for a motor includes sensing variation of magnetic pole of a rotator of the motor, to generate a magnetic pole sensing signal, determining dead zone of the motor according to the magnetic pole sensing signal, to generate a determination result, and adjusting voltage outputted to a coil of the rotator according to the determination result.

Abstract: A control method of a current limit of a DC motor includes generating a reference voltage according to a preset current limit value of a DC motor; comparing the reference voltage with the voltage drop of a power control switch which drives the DC motor to generate a compare result; and controlling the power delivered to the DC motor according to the compare result in order to limit the current of the DC motor.

Abstract: A pulse width modulation circuit capable of linearly adjusting duty cycle with voltage, which comprises an input voltage source for generating an input voltage, a regulator for generating a regulated voltage, a first voltage-dividing unit for providing a first divided voltage, a second voltage-dividing unit for providing a second divided voltage, a third voltage-dividing unit for providing a third divided voltage, a voltage adder for adding the first divided voltage and the third divided voltage for generating a high level voltage, a waveform generator for generating an oscillating signal according to the high level voltage and the third divided voltage, and a comparator having a first input terminal coupled to the second voltage-dividing unit, a second terminal coupled to the waveform generator, and an output terminal for comparing the second divided voltage with the oscillating signal to output a pulse width modulation signal through the output terminal.

Abstract: A pulse width modulation circuit capable of linearly adjusting duty cycle with voltage, which comprises an input voltage source for generating an input voltage, a regulator for generating a regulated voltage, a first voltage-dividing unit for providing a first divided voltage, a second voltage-dividing unit for providing a second divided voltage, a third voltage-dividing unit for providing a third divided voltage, a voltage adder for adding the first divided voltage and the third divided voltage for generating a high level voltage, a waveform generator for generating an oscillating signal according to the high level voltage and the third divided voltage, and a comparator having a first input terminal coupled to the second voltage-dividing unit, a second terminal coupled to the waveform generator, and an output terminal for comparing the second divided voltage with the oscillating signal to output a pulse width modulation signal through the output terminal.

Abstract: A sensorless method for starting a three-phase brushless direct-current motor includes generating a start-up control signal, a start mode selection signal, and a control signal commutation period; switching to a start mode according to the start mode selection signal; implementing a position aligning procedure according to the start-up control signal and the control signal commutation period; detecting a zero crossing point of back electromotive forces during each control signal commutation period; outputting a sensorless mode selection signal while detecting the zero crossing points of the back electromotive forces during consecutive control signal commutation periods; switching to a sensorless mode according to the sensorless mode selection signal; and detecting a zero crossing point of back electromotive forces in the sensorless mode to determine a starting result of the three-phase brushless direct-current motor.

Abstract: A motor driving circuit for adjusting speed of the motor by changing output voltage is disclosed. One end of the motor is coupled to a variable voltage source. The motor driving circuit includes a motor-driving unit, a control unit and a determining unit. The motor-driving unit includes a first end coupled to another end of the motor, a second end coupled to a ground and a third end, and is utilized for driving the motor. The control unit is utilized for controlling the voltage between the first end and the third end of the motor-driving unit. The determining unit is coupled between the variable voltage source and the control unit, and is utilized for controlling the control unit to adjust the voltage between the first end and the third end of the motor-driving unit according to magnitude of the voltage of the variable voltage source.

Abstract: An inrush voltage clamping circuit for an electronic device for clamping an inrush voltage induced by hot plugging is disclosed. The clamp circuit includes a buffer unit and a clamp unit. The buffer unit is coupled to an input power end for receiving an inrush current of the inrush voltage. The clamp unit is coupled to the input power end and the buffer unit for controlling the buffer unit to receive the inrush current according to an input voltage of the input power end.

Abstract: A driving circuit includes a power supply, an input capacitor, a Hall sensor, a first amplifier, a second amplifier, a full-bridge driver circuit, and a first operational amplifier. The input capacitor is coupled to the power supply. The input end of the first amplifier and the second amplifier is coupled to the output end of the Hall sensor. The control end of the full-bridge driver circuit is coupled to the output end of the first amplifier and the output end of the second amplifier. The first operational amplifier includes a first input end for receiving a first reference voltage and a second input end coupled to the first output end of the full-bridge driver circuit.

Abstract: A driving circuit for switching DC power includes a DC power generator, a bridge circuit, a control signal generator, and a clamping module. The bridge circuit includes a plurality of legs each including an up-bridge switch and a down-bridge switch. The clamping circuit is coupled to each up-bridge switch of the bridge circuit for clamping voltage of an input end of the up-bridge switch.

Abstract: A power cutter, an oscillator, a counter, a S-R latch, and a Hall bias are further disposed inside a DC motor driving circuit so that current consumption of the DC motor driving circuit is reduced significantly under a standby mode. When the counter detects that a received pulse width modulation signal stays at a low electrical level over a predetermined time, the counter triggers the S-R latch so as to activate a disabling signal of the power cutter for shutting down most elements until the pulse width modulation signal returns to a high electrical level. With the aid of the built-in Hall bias, space for externally coupling the Hall bias is saved, and moreover, a Hall sensor retrieves a dynamically-adjusted power and currents so that remarkable current consumption is saved under a standby mode.

Abstract: A power cutter, an oscillator, a counter, a S-R latch, and a Hall bias are further disposed inside a DC motor driving circuit so that current consumption of the DC motor driving circuit is reduced significantly under a standby mode. When the counter detects that a received pulse width modulation signal stays at a low electrical level over a predetermined time, the counter triggers the S-R latch so as to activate a disabling signal of the power cutter for shutting down most elements until the pulse width modulation signal returns to a high electrical level. With the aid of the built-in Hall bias, space for externally coupling the Hall bias is saved, and moreover, a Hall sensor retrieves a dynamically-adjusted power and currents so that remarkable current consumption is saved under a standby mode.

Abstract: A full bridge circuit includes a first switch, a second switch, a third switch, a fourth switch, a first controller, a second controller, a first operational amplifier, a first multiplexer, a second operational amplifier, and a second multiplexer. The first controller includes a first output coupled to the first switch. The second controller includes a first output coupled to the third switch. The first operational amplifier includes a first input coupled to the first switch and the second switch, and a second input for receiving a first reference voltage. The second operational amplifier includes a first input coupled to the third switch and the fourth switch, and a second input for receiving a second reference voltage. The first multiplexer is coupled to the first operational amplifier, the first controller, and the second switch. The second multiplexer is coupled to the second operational amplifier, the second controller, and the fourth switch.

Abstract: A driving circuit for switching DC power includes a DC power generator, a bridge circuit, a control signal generator, and a clamping module. The bridge circuit includes a plurality of legs each including an up-bridge switch and a down-bridge switch. The clamping circuit is coupled to each up-bridge switch of the bridge circuit for clamping voltage of an input end of the up-bridge switch.

Abstract: A full bridge circuit includes a first switch, a second switch, a third switch, a fourth switch, a first controller, a second controller, a first operational amplifier, a first multiplexer, a second operational amplifier, and a second multiplexer. The first controller includes a first output coupled to the first switch. The second controller includes a first output coupled to the third switch. The first operational amplifier includes a first input coupled to the first switch and the second switch, and a second input for receiving a first reference voltage. The second operational amplifier includes a first input coupled to the third switch and the fourth switch, and a second input for receiving a second reference voltage. The first multiplexer is coupled to the first operational amplifier, the first controller, and the second switch. The second multiplexer is coupled to the second operational amplifier, the second controller, and the fourth switch.

Abstract: A driving circuit includes a power supply, an input capacitor, a Hall sensor, a first amplifier, a second amplifier, a full-bridge driver circuit, and a first operational amplifier. The input capacitor is coupled to the power supply. The input end of the first amplifier and the second amplifier is coupled to the output end of the Hall sensor. The control end of the full-bridge driver circuit is coupled to the output end of the first amplifier and the output end of the second amplifier. The first operational amplifier includes a first input end for receiving a first reference voltage and a second input end coupled to the first output end of the full-bridge driver circuit.