Patents by Inventor Kun-Ting Hung

Kun-Ting Hung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10103128
    Abstract: A semiconductor package is provided. The semiconductor package includes a carrier substrate having opposite first surface and second surface, and a chip stack disposed on the first surface of the carrier substrate. The chip stack includes a first semiconductor die, a second semiconductor die, and an interposer between the first semiconductor die and the second semiconductor die. The interposer transmits signals between the first semiconductor die and the second semiconductor die.
    Type: Grant
    Filed: May 7, 2017
    Date of Patent: October 16, 2018
    Assignee: MEDIATEK INC.
    Inventors: Che-Ya Chou, Kun-Ting Hung, Chia-Hao Yang, Nan-Cheng Chen
  • Publication number: 20170243858
    Abstract: A semiconductor package is provided. The semiconductor package includes a carrier substrate having opposite first surface and second surface, and a chip stack disposed on the first surface of the carrier substrate. The chip stack includes a first semiconductor die, a second semiconductor die, and an interposer between the first semiconductor die and the second semiconductor die. The interposer transmits signals between the first semiconductor die and the second semiconductor die.
    Type: Application
    Filed: May 7, 2017
    Publication date: August 24, 2017
    Inventors: Che-Ya Chou, Kun-Ting Hung, Chia-Hao Yang, Nan-Cheng Chen
  • Patent number: 8089164
    Abstract: The present invention relates to a substrate having optional circuits and a structure of flip chip bonding. The substrate includes a substrate body, at least one substrate pad, a first conductive trace and a second conductive trace. The substrate body has a surface. The substrate pad is disposed on the surface of the substrate body. The first conductive trace is connected to a first circuit, and has a first breaking area so it forms a discontinuous line. The second conductive trace is connected to a second circuit, and has a second breaking area so tit forms a discontinuous line. The second conductive trace and the first conductive trace are connected to the same substrate pad. Thus, the substrate can choose to connect different circuits, so the substrate can be applied to different products by connecting the desired circuit, thus reducing the manufacturing cost.
    Type: Grant
    Filed: September 23, 2009
    Date of Patent: January 3, 2012
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Ko-Wei Lin, Yun-Hsiang Tien, Kun-Ting Hung
  • Publication number: 20100176516
    Abstract: The present invention relates to a substrate having optional circuits and a structure of flip chip bonding. The substrate includes a substrate body, at least one substrate pad, a first conductive trace and a second conductive trace. The substrate body has a surface. The substrate pad is disposed on the surface of the substrate body. The first conductive trace is connected to a first circuit, and has a first breaking area so it forms a discontinuous line. The second conductive trace is connected to a second circuit, and has a second breaking area so tit forms a discontinuous line. The second conductive trace and the first conductive trace are connected to the same substrate pad. Thus, the substrate can choose to connect different circuits, so the substrate can be applied to different products by connecting the desired circuit, thus reducing the manufacturing cost.
    Type: Application
    Filed: September 23, 2009
    Publication date: July 15, 2010
    Inventors: Ko-Wei Lin, Yun-Hsiang Tien, Kun-Ting Hung