Abstract: An operational amplifier circuit in a display apparatus which is fast-acting to prevent voltage overshoot comprises a pre-operational amplifier module, an output operational amplifier module, and an output module. Driving current from the pre-operational amplifier module is the basis of the output operational amplifier module generating a dynamic bias voltage to the output module. The output operational amplifier module detects the dynamic bias voltage and adjusts the bias voltage to be level with a specified voltage based on at least one control voltage. When the dynamic bias voltage is less than the specified voltage, the output operational amplifier module pulls up the bias voltage and when the bias voltage is larger than the specified voltage, the output operational amplifier module pulls down the bias voltage. The pull up and pull down speeds are proportional to the at least one control voltage.

Abstract: An operational amplifier circuit in a display apparatus which is fast-acting to prevent voltage overshoot comprises a pre-operational amplifier module, an output operational amplifier module, and an output module. Driving current from the pre-operational amplifier module is the basis of the output operational amplifier module generating a dynamic bias voltage to the output module. The output operational amplifier module detects the dynamic bias voltage and adjusts the bias voltage to be level with a specified voltage based on at least one control voltage. When the dynamic bias voltage is less than the specified voltage, the output operational amplifier module pulls up the bias voltage and when the bias voltage is larger than the specified voltage, the output operational amplifier module pulls down the bias voltage. The pull up and pull down speeds are proportional to the at least one control voltage.

Abstract: A self-capacitive touch display panel includes a resistor, a first capacitor, a second capacitor, a third capacitor, a common electrode, a display driving source, and a touch sensing circuit. The first capacitor is coupled between a first terminal of the resistor and a ground terminal. The second capacitor and the third capacitor are coupled in series between the first terminal of the resistor and the ground terminal. The common electrode is coupled to a second terminal of the resistor. The display driving source is coupled between the second capacitor and the third capacitor. The touch sensing circuit is coupled to the common electrode and used to sense a touch capacitance via the common electrode when touch sensing. A first driving voltage of the display driving source is larger than a second driving voltage of the common electrode, so that the touch capacitance sensed by the touch sensing circuit is smaller than the capacitance of the first capacitor.

Abstract: A self-capacitive touch display panel includes a resistor, a first capacitor, a second capacitor, a third capacitor, a common electrode, a display driving source, and a touch sensing circuit. The first capacitor is coupled between a first terminal of the resistor and a ground terminal. The second capacitor and the third capacitor are coupled in series between the first terminal of the resistor and the ground terminal. The common electrode is coupled to a second terminal of the resistor. The display driving source is coupled between the second capacitor and the third capacitor. The touch sensing circuit is coupled to the common electrode and used to sense a touch capacitance via the common electrode when touch sensing. A first driving voltage of the display driving source is larger than a second driving voltage of the common electrode, so that the touch capacitance sensed by the touch sensing circuit is smaller than the capacitance of the first capacitor.

Abstract: A level shifter includes a first transistor, a second transistor, a third transistor, a fourth transistor, and a switching element. The first transistor is connected to a first node, the input signal and a first power supply voltage. The second transistor is connected to a second node, an inverted input signal and the first power supply voltage. The third transistor is connected to a second power supply voltage, the first node and the second node. The fourth transistor is connected to the second power supply voltage, the second node and the first node. The switching element is connected between the first node and the second node. When a voltage level of the input signal is changed, the switching element is turned on for a time interval according to the enabling signal, so that a voltage level of the output signal is changed.

Abstract: A driving circuit for a liquid crystal display includes a plurality of driving units each including a first OP amplifier, a second OP amplifier and a plurality of switches for switching outputs and feedback paths of the OP amplifiers. Because the switches are disposed in the feedback paths of the OP amplifiers of the driving unit, an output impedance of the driving unit can be effectively reduced and the stable time of the output voltage can be shortened.

Abstract: An LCD panel driving method and device with charge sharing is disclosed. The LCD panel includes a plurality of switches, a plurality of data lines, a signal driving circuit for generating a plurality of image signals, a charge sharing common voltage driving circuit and a common capacitor having one end connected to the charge sharing common voltage driving circuit through a common voltage node. The method turns the switches on to thereby form the charge sharing common voltage driving circuit and the signal driving circuit as a short circuit, such that charges stored in the common capacitor flow into the data lines to drive the common voltage node to enter in an inverse phase state in order to sequentially turn the switches on and then off to accordingly sample the respective data lines.

Abstract: An LCD driver circuit having a common electrode, a gate driving circuit and a source driving circuit is provided. The LCD driver circuit is applied to a display panel which has a plurality of pixels, a plurality of scan lines and a data line. The scan lines are divided into a plurality of scan line groups. The scan line groups are disposed on the display panel in a first sequence. The common electrode outputs a common voltage. The gate driving circuit is coupled to the scan lines and provides a control voltage to each scan line in a second sequence different from the first sequence. The source driving circuit is coupled to the data line to provide a gray level voltage to the data line. An area of the gray level voltage being higher or lower than the common voltage corresponds to a high level area of the control voltages in the nonadjacent scan line groups, and polarities of the operated pixels in the adjacent scan line groups are opposite.

Abstract: An output stage circuit is disclosed, which includes a first PMOS transistor, a second PMOS transistor, a first NMOS transistor, and a second NMOS transistor. By using twin-well CMOS transistors and a specific circuit configuration, the invention supports a HALF AVDD structure, reduces power consumption and saves the cost of triple-well CMOS process.

Abstract: An output stage circuit is disclosed, which includes a first PMOS transistor, a second PMOS transistor, a first NMOS transistor, and a second NMOS transistor. By using twin-well CMOS transistors and a specific circuit configuration, the invention supports a HALF AVDD structure, reduces power consumption and saves the cost of triple-well CMOS process.

Abstract: A rail-to-rail class-AB operational amplifier includes a first differential pair unit for receiving a pair of differential signals and generating a first control signal; a second differential pair unit for receiving the pair of differential signals and generating a second control signal; and an output stage for receiving the first control signal and the second control signal and then generating an output voltage. The first differential pair unit includes a first active load, a first transistor differential pair and a first current source. The second differential pair unit includes a second current source, a second transistor differential pair and a second active load.

Abstract: An operational amplifier driver capable of canceling an offset voltage of an operational amplifier includes the operational amplifier, first to third switches and a capacitor. The operational amplifier has a chopper, first and second input terminals and an output terminal. The first switch receives an input voltage and is connected to the first input terminal. The second switch is connected to the first input terminal and the output terminal. The third switch is connected the second input terminal and the output terminal. The capacitor is connected to the second input terminal. Because the operational amplifier driver directly charges/discharges the capacitor through the output terminal, and the polarities of the first input terminal and the second input terminal may be changed, the operational amplifier driver can shorten a charge/discharge time of the capacitor and cancel the offset voltage without increasing a level of an input signal.

Abstract: A rail-to-rail class-AB operational amplifier includes a first differential pair unit for receiving a pair of differential signals and generating a first control signal; a second differential pair unit for receiving the pair of differential signals and generating a second control signal; and an output stage for receiving the first control signal and the second control signal and then generating an output voltage. The first differential pair unit includes a first active load, a first transistor differential pair and a first current source. The second differential pair unit includes a second current source, a second transistor differential pair and a second active load.

Abstract: An operational amplifier driver capable of canceling an offset voltage of an operational amplifier includes the operational amplifier, first to third switches and a capacitor. The operational amplifier has a chopper, first and second input terminals and an output terminal. The first switch receives an input voltage and is connected to the first input terminal. The second switch is connected to the first input terminal and the output terminal. The third switch is connected the second input terminal and the output terminal. The capacitor is connected to the second input terminal. Because the operational amplifier driver directly charges/discharges the capacitor through the output terminal, and the polarities of the first input terminal and the second input terminal may be changed, the operational amplifier driver can shorten a charge/discharge time of the capacitor and cancel the offset voltage without increasing a level of an input signal.

Abstract: A driving circuit for a liquid crystal display includes a plurality of driving units each including a first OP amplifier, a second OP amplifier and a plurality of switches for switching outputs and feedback paths of the OP amplifiers. Because the switches are disposed in the feedback paths of the OP amplifiers of the driving unit, an output impedance of the driving unit can be effectively reduced and the stable time of the output voltage can be shortened.

Abstract: A level shifter has a pair of P-type MOS transistor switches, a pair of N-type MOS transistor switches, an inverter and a plurality of triggers. The triggers are connected to gates of high-voltage devices (N-type MOS transistor switches) and substrates of the high-voltage devices, so that the triggers can produce a trigger signal for a period of time after receiving a low voltage control signal in order to change voltages on the substrates at transition and further reduce threshold voltages of the substrates to increase transition speed of the shifter circuit.

Abstract: A liquid crystal display and its driving method utilize a polarity arrangement timing generator to generate signals for polarity-arrangement control. Those signals are output to a polarity arrangement programmable data driver, which accordingly produces a set of signals with aperiodically arranged polarities. Those aperiodic signals are exported to a display panel so that the pixels on the panel are supplied with voltage signals with an aperiodic polarity distribution. Further, picture frames displayed in pre-determined time period have pixel polarity distributions that are mutually complementary; that is, one half of the frames have pixels with polarities exactly opposite to those of the pixels in the other half.