Patents by Inventor Kun Wah Yip

Kun Wah Yip has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7395291
    Abstract: A sliding correlator for timing synchronization in HIPERLAN/2 and IEEE 802.11a wireless local area networks by correlating the received signal with a known waveform is disclosed. The disclosed sliding correlator avoids the large number of complex multiplications per second, about 320 million by one estimate, by employing an implementation that avoids multiplication operations while also avoiding complexity. This invention discloses methods and apparatus to implement this correlator, using alternative correlator coefficients well suited for digital implementations, whereby the need to perform multiplication is eliminated.
    Type: Grant
    Filed: February 24, 2004
    Date of Patent: July 1, 2008
    Assignee: The University of Hong Kong
    Inventors: Kun Wah Yip, Yik Chung Wu, Tung Sang Ng
  • Publication number: 20050187996
    Abstract: A sliding correlator for timing synchronization in HIPERLAN/2 and IEEE 802.11a wireless local area networks by correlating the received signal with a known waveform is disclosed. The disclosed sliding correlator avoids the large number of complex multiplications per second, about 320 million by one estimate, by employing an implementation that avoids multiplication operations while also avoiding complexity. This invention discloses methods and apparatus to implement this correlator, using alternative correlator coefficients well suited for digital implementations, whereby the need to perform multiplication is eliminated.
    Type: Application
    Filed: February 24, 2004
    Publication date: August 25, 2005
    Inventors: Kun Wah Yip, Yik Chung Wu, Tung Sang Ng
  • Patent number: 6868115
    Abstract: An all-lag correlator is provided that correlates a received spread-spectrum signal with a reference code and produces at each sampling instance N correlation lags corresponding to the correlation of the received signal with 0, 1, . . . , N?1 lags (or delays) of the reference code, wherein N is the length of the reference code. The correlator includes a spread spectrum signal storage means, subtraction means, multiplication means, correlation lag storage means and addition means configured such that a correlation lag for a present sampling instance is based on a correlation lag of a previous sampling instance.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: March 15, 2005
    Assignee: University of Hong Kong
    Inventors: Chin Long Cheng, Tung Sang Ng, Kun Wah Yip
  • Patent number: 6847676
    Abstract: An all-lag rotating-reference correlator correlates a received spread-spectrum signal with a rotating reference code, and produces in each sampling instance N correlation lags corresponding to the correlation of the received signal with 0, 1, . . . , N?1 lags (or delays) of the rotating reference code, wherein N is the length of the rotating reference code. The rotating reference code is time-variant and is generated by a rotation of a basic reference code. The received signal, possibly embedded in noise and interference, consists of periodic replicas of the basic reference code with or without data modulation. The first embodiment of the present invention describes a method and apparatus of an all-lag rotating-reference correlator which is applicable to situations where data modulation is not present in the received signal.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: January 25, 2005
    Assignee: University of Hong Kong
    Inventors: Tung Sang Ng, Chin Long Cheng, Kun Wah Yip
  • Publication number: 20010032318
    Abstract: A method an apparatus for protecting a configuration data sequence from reverse engineering is provided. The configuration data sequence includes a plurality of configuration bits and is used to configure the operation of a programmable device, such as an FPGA or other reconfigurable logic. According to a method of the present invention, the configuration bits of the configuration data sequence are partially encrypted by altering some, but not all, of the bits, and subsequently storing the partially-encrypted configuration data sequence external to the programmable device. Corresponding decryption information is then stored within the programmable device, which decrypts the partially-encrypted configuration data sequence using the decryption information stored therein to thereby configure internal logic of the programmable device.
    Type: Application
    Filed: December 1, 2000
    Publication date: October 18, 2001
    Inventors: Kun Wah Yip, Tung Sang Ng