Abstract: An electrophoresis display includes a pixel control array including pixel units, a gate control circuit electrically connected to the pixel control array. The gate control circuit includes a plurality of gate driving circuit sets, one of the gate driving circuit sets includes a plurality of gate driving circuits. One of the gate driving circuits includes gate thin film transistor where an output of one gate driving circuit is electrically connected to a gate line of the pixel control array, a plurality of control signal lines where one of the control signal lines is connected to an input of one of the gate driving circuits of one gate driving circuit set, a plurality of gate driving circuit set enable lines where one of the gate driving circuit set enable lines is connected to the enable control points of the gate driving circuits of each gate driving circuit set.

Abstract: A reflective color display with color filter layer includes a first substrate, a thin film transistor layer, a pixel electrode layer, a color filter layer, and a display material layer. The pixel electrode layer includes a plurality of pixel electrodes and the color filter layer includes a plurality of color filter blocks. Part of the color filter blocks are in one-by-one correspondence with the pixel electrodes, part of the color filter blocks are in multiple-to-one or one-to-multiple correspondence with the pixel electrodes.

Abstract: A reflective color display with micro-partitioned color filter layer includes a first substrate, a thin film transistor layer, a pixel electrode layer, a color filter layer, and a display material layer. The pixel electrode layer includes a plurality of pixel electrodes and the color filter layer includes a plurality of color filter blocks. Part of the color filter blocks are in one-by-one correspondence with the pixel electrodes, part of the color filter blocks are in multiple-to-one or one-to-multiple correspondence with the pixel electrodes. The display material layer includes a micro partition structure with a plurality of partition walls, cavities defined by the micro partition structure, and colloidal solution filled in the cavities and containing a plurality of suspended charged color particles.

Abstract: An electrophoresis display with support structure includes a control substrate, an opposite substrate, an electrophoresis material layer arranged between the two substrates, a pixel electrode layer including a plurality of pixel electrodes and a pixel gap defined between two adjacent pixel electrodes, a plurality supporting structures with supporting structure gap therebetween and the supporting structure gap having at least one size. A colloidal solution is at least filled between the supporting structures.

Abstract: An electrophoresis display double-side control circuit substrate includes a first control substrate having a first face and a second face, a first driving circuit layer and a first control electrode layer sequentially arranged on the second face, a second control substrate having a third face and a fourth face, a second driving circuit layer and a second control electrode layer sequentially arranged on the third face. The electrophoresis display includes a micro partition structure arranged between the first control substrate and the second control substrate and made from polymer material. The micro partition structure includes a plurality of partition walls to define chambers for accommodating a colloidal solution.

Abstract: A color display with brightness-enhancing color filter layer includes a first substrate having a first face and a second face, a brightness-enhancing color filter layer having a plurality of color filter units, and a second substrate having a third face and a fourth face, a display material layer sandwiched between the first substrate and the second substrate. Each of the color filter units includes a layer or multiple layers of filtering color blocks, and the filtering color blocks correspond to at least three different colors. In the visible light range of 380 nm˜780 nm, at least two color filter units of different colors have full width at half maximum more than 150 nm. The display material layer is filled with colloidal solution containing charged color particles with at least one color.

Abstract: A reflective color display includes a first substrate having a first face and a second face, a color filter layer having a plurality of color filter units, and a second substrate having a third face and a fourth face, a display material layer sandwiched between the first substrate and the second substrate. Each of the color filter units includes a layer or multiple layers of filtering color blocks, and the filtering color blocks correspond to at least three different colors. In the visible light range of 380 nm˜780 nm, at least two color filter units of different colors have full widths at half maximum more than 150 nm. The display material layer is filled with colloidal solution containing charged color particles with at least one color, or filled with liquid crystal material.

Abstract: An electrophoresis display includes a control substrate having a first face and a second face, a driving circuit layer, a control electrode layer, an electrophoresis layer, and an opposite substrate. The viewing face of the electrophoresis display is on the first face of the control substrate. The aperture ratio of the control substrate in the electrophoresis display, viewed from the first face of the control substrate and toward a display area of the electrophoresis display, is not less than 70%.

Abstract: An electrophoresis display includes a control substrate having a first face and a second face, a driving circuit layer, a control electrode layer, an electrophoresis layer, and an opposite substrate. The viewing face of the electrophoresis display is on the first face of the control substrate.

Abstract: An electrophoresis display with tapered micro partition structure includes a control substrate having a first face and a second face, a driving circuit layer, a control electrode layer, and an electrophoresis layer. The driving circuit layer, the control electrode layer, and the electrophoresis layer are sequentially arranged on the second face. The electrophoresis layer includes a micro partition structure arranged on the control substrate and made from polymer material. The micro partition structure includes a plurality of partition walls to define chambers for accommodating a colloidal solution. The sectional width of the partition wall decreases with a layer number of a polymer stacks forming the partition wall increases.

Abstract: An electrophoresis display double-side control circuit substrate includes a first control substrate having a first face and a second face, a first driving circuit layer and a first control electrode layer sequentially arranged on the second face, a second control substrate having a third face and a fourth face, a second driving circuit layer and a second control electrode layer sequentially arranged on the third face. The electrophoresis display includes a micro partition structure arranged between the first control substrate and the second control substrate and made from polymer material. The micro partition structure includes a plurality of partition walls to define chambers for accommodating a colloidal solution.

Abstract: An electrophoresis display with improved micro partition structure includes a control substrate having a first face and a second face, a driving circuit layer, a control electrode layer, and an electrophoresis layer. The driving circuit layer, the control electrode layer, and the electrophoresis layer are sequentially arranged on the second face. The electrophoresis layer includes a micro partition structure arranged on the control substrate and made from polymer material. The micro partition structure includes a plurality of partition walls to define chambers for accommodating a colloidal solution. The height of the partition wall of the micro partition structure is smaller than 25 ?m.

Abstract: An electrophoresis display with high aperture ratio includes a control substrate having a first face and a second face, a driving circuit layer, a control electrode layer, an electrophoresis layer, and an opposite substrate. The driving circuit layer includes a plurality of thin film transistors (TFT), a plurality of gate lines, and plurality of data lines. Each of the gate line is connected to the gates of the TFTs and each of the data lines is connected to the sources or the drains of the TFTs. The sum of the data line width and the gate line width is not larger than 10 ?m. The aperture ratio of the electrophoresis display, viewed from the first face of the control substrate and toward a display area of the electrophoresis display, is not less than 80%.

Abstract: An electrophoresis display with gapped micro partition structure includes a control substrate having a first face and a second face, a driving circuit layer, a control electrode layer, and an electrophoresis layer. The driving circuit layer, the control electrode layer, and the electrophoresis layer are sequentially arranged on the second face. The electrophoresis layer includes a micro partition structure arranged on the control substrate and made from polymer material. The micro partition structure includes a plurality of partition walls to define chambers for accommodating a colloidal solution. Two adjacent partition walls have a gap therebetween and used as yielding space when the electrophoresis display is bent. The area of the gap is not larger than 50% of the area of the partition wall. Or the length of the gap is not longer than 50% of the length of the partition wall.

Abstract: An electrophoresis display with high aperture ratio includes a control substrate having a first face and a second face, a driving circuit layer, a control electrode layer, an electrophoresis layer, and an opposite substrate. The driving circuit layer includes a plurality of thin film transistors (TFT), a plurality of gate lines, and plurality of data lines. Each of the gate line is connected to the gates of the TFTs and each of the data lines is connected to the sources or the drains of the TFTs. The area of a semiconductor part of the TFT is at least partially overlapped with the area of one of the gate lines or the area of one of the date lines along a projection direction.

Abstract: An electrophoretic display with charge balance enhancing circuit includes a control substrate, a charge balance substrate, a charge balance electrode, a display layer arranged on one side of the control substrate, and a charge balance enhancing circuit. The electrophoretic display further includes a plurality of pixel electrodes, a plurality of capacitance electrodes and a plurality of storage capacitors. One end of the storage capacitor is the capacitance electrode. The charge balance enhancing circuit includes a charge-voltage conversion capacitor having a first terminal and a second terminal. The second electrode of the storage capacitor is electrically connected to the first terminal of the charge-voltage conversion capacitor, and the charge balance electrode is electrically connected to the second terminal of the charge-voltage conversion capacitor.

Abstract: An electrophoresis display includes a pixel control array including pixel units, a gate control circuit electrically connected to the pixel control array. The gate control circuit includes a plurality of gate driving circuit sets, one of the gate driving circuit sets includes a plurality of gate driving circuits. One of the gate driving circuits includes gate thin film transistor where an output of one gate driving circuit is electrically connected to a gate line of the pixel control array, a plurality of control signal lines where one of the control signal lines is connected to an input of one of the gate driving circuits of one gate driving circuit set, a plurality of gate driving circuit set enable lines where one of the gate driving circuit set enable lines is connected to the enable control points of the gate driving circuits of each gate driving circuit set.

Abstract: An electrophoresis display with gapped micro partition structure includes a control substrate having a first face and a second face, a driving circuit layer, a control electrode layer, and an electrophoresis layer. The driving circuit layer, the control electrode layer, and the electrophoresis layer are sequentially arranged on the second face. The electrophoresis layer includes a micro partition structure arranged on the control substrate and made from polymer material. The micro partition structure includes a plurality of partition walls to define chambers for accommodating a colloidal solution. Two adjacent partition walls have a gap therebetween and used as yielding space when the electrophoresis display is bent. The area of the gap is not larger than 50% of the area of the partition wall. Or the length of the gap is not longer than 50% of the length of the partition wall.

Abstract: An electrophoresis display double-side control circuit substrate includes a first control substrate having a first face and a second face, a first driving circuit layer and a first control electrode layer sequentially arranged on the second face, a second control substrate having a third face and a fourth face, a second driving circuit layer and a second control electrode layer sequentially arranged on the third face. The electrophoresis display includes a micro partition structure arranged between the first control substrate and the second control substrate and made from polymer material. The micro partition structure includes a plurality of partition walls to define chambers for accommodating a colloidal solution.

Abstract: An electrophoresis display with high aperture ratio includes a control substrate having a first face and a second face, a driving circuit layer, a control electrode layer, an electrophoresis layer, and an opposite substrate. The driving circuit layer includes a plurality of thin film transistors (TFT), a plurality of gate lines, and plurality of data lines. Each of the gate line is connected to the gates of the TFTs and each of the data lines is connected to the sources or the drains of the TFTs. The area of a semiconductor part of the TFT is at least partially overlapped with the area of one of the gate lines or the area of one of the date lines along a projection direction.