Patents by Inventor Kun-Yuan Lo

Kun-Yuan Lo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9406516
    Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming an interfacial layer on the substrate; forming a high-k dielectric layer on the interfacial layer; forming a first bottom barrier metal (BBM) layer on the high-k dielectric layer; performing a thermal treatment; removing the first BBM layer; and forming a second BBM layer on the high-k dielectric layer.
    Type: Grant
    Filed: April 7, 2015
    Date of Patent: August 2, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Jian-Cun Ke, Chih-Wei Yang, Kun-Yuan Lo, Chia-Fu Hsu, Shao-Wei Wang
  • Patent number: 9312352
    Abstract: A method for fabricating a field-effect transistor is provided. The method includes: forming a gate dielectric layer and a barrier layer on a substrate in sequence; forming a first silicon layer on and in contact with the barrier layer; performing a thermal treatment to form a silicide layer between the barrier layer and the first silicon layer; and forming a second silicon layer on and in contact with the first silicon layer.
    Type: Grant
    Filed: October 2, 2015
    Date of Patent: April 12, 2016
    Assignee: UNITED MICROELECTRONICS CORPORATION
    Inventors: Kun-Yuan Lo, Chih-Wei Yang, Cheng-Guo Chen, Rai-Min Huang, Jian-Cun Ke
  • Publication number: 20160027885
    Abstract: A method for fabricating a field-effect transistor is provided. The method includes: forming a gate dielectric layer and a barrier layer on a substrate in sequence; forming a first silicon layer on and in contact with the barrier layer; performing a thermal treatment to form a silicide layer between the barrier layer and the first silicon layer; and forming a second silicon layer on and in contact with the first silicon layer.
    Type: Application
    Filed: October 2, 2015
    Publication date: January 28, 2016
    Inventors: Kun-Yuan LO, Chih-Wei YANG, Cheng-Guo CHEN, Rai-Min HUANG, Jian-Cun KE
  • Patent number: 9184254
    Abstract: A field-effect transistor comprises a substrate, a gate dielectric layer, a barrier layer, a metal gate electrode and a source/drain structure. The gate dielectric layer is disposed on the substrate. The barrier layer having a titanium-rich surface is disposed on the gate dielectric layer. The metal gate electrode is disposed on the titanium-diffused surface. The source/drain structure is formed in the substrate and adjacent to the metal gate electrode.
    Type: Grant
    Filed: May 2, 2013
    Date of Patent: November 10, 2015
    Assignee: UNITED MICROELECTRONICS CORPORATION
    Inventors: Kun-Yuan Lo, Chih-Wei Yang, Cheng-Guo Chen, Rai-Min Huang, Jian-Cun Ke
  • Publication number: 20150214060
    Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming an interfacial layer on the substrate; forming a high-k dielectric layer on the interfacial layer; forming a first bottom barrier metal (BBM) layer on the high-k dielectric layer; performing a thermal treatment; removing the first BBM layer; and forming a second BBM layer on the high-k dielectric layer.
    Type: Application
    Filed: April 7, 2015
    Publication date: July 30, 2015
    Inventors: Jian-Cun Ke, Chih-Wei Yang, Kun-Yuan Lo, Chia-Fu Hsu, Shao-Wei Wang
  • Publication number: 20150069534
    Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming an interfacial layer on the substrate; forming a high-k dielectric layer on the interfacial layer; forming a first bottom barrier metal (BBM) layer on the high-k dielectric layer; performing a thermal treatment; removing the first BBM layer; and forming a second BBM layer on the high-k dielectric layer.
    Type: Application
    Filed: September 11, 2013
    Publication date: March 12, 2015
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Jian-Cun Ke, Chih-Wei Yang, Kun-Yuan Lo, Chia-Fu Hsu, Shao-Wei Wang
  • Publication number: 20140327093
    Abstract: A field-effect transistor comprises a substrate, a gate dielectric layer, a barrier layer, a metal gate electrode and a source/drain structure. The gate dielectric layer is disposed on the substrate. The barrier layer having a titanium-rich surface is disposed on the gate dielectric layer. The metal gate electrode is disposed on the titanium-diffused surface. The source/drain structure is formed in the substrate and adjacent to the metal gate electrode.
    Type: Application
    Filed: May 2, 2013
    Publication date: November 6, 2014
    Applicant: UNITED MICROELECTRONICS CORPORATION
    Inventors: Kun-Yuan LO, Chih-Wei YANG, Cheng-Guo CHEN, Rai-Min HUANG, Jian-Cun KE
  • Patent number: 8501636
    Abstract: A method for fabricating silicon dioxide layer is disclosed. The method includes the following steps. Firstly, a semiconductor substrate is provided. Next, the semiconductor substrate is cleaned with a solution containing hydrogen peroxide to form a chemical oxide layer on the semiconductor substrate. Then, the chemical oxide layer is heated in no oxygen atmosphere, such that the chemical oxide layer forms a compact layer. Then, the semiconductor substrate is heated in oxygen atmosphere to form a silicon dioxide layer between the semiconductor substrate and the compact layer.
    Type: Grant
    Filed: July 24, 2012
    Date of Patent: August 6, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Shao-Wei Wang, Yu-Ren Wang, Chien-Liang Lin, Ying-Wei Yen, Kun-Yuan Lo, Chih-Wei Yang
  • Patent number: 6353965
    Abstract: The present invention is about a guiding sheath with spacer for the hinge of eye-glasses, such that the sheath provides low frictional spacer to titanium alloy hinges. Sheath with spacer made from bronze or synthetic rubber with frictional coefficient less than that of titanium alloy can effectively lower the wear and tear at the hinge due to friction, enhance the smooth folding of the hinge, and thus extend the durability of the hinge. In addition to providing spacer, the present invention also provides positioning latch to the active core of the hinge and lateral support to the shaft during displacement, effectively enhances the stability of the shaft during displacement.
    Type: Grant
    Filed: August 11, 2000
    Date of Patent: March 12, 2002
    Assignee: Ching Lan Co., Ltd.
    Inventor: Kun-Yuan Lo