Patents by Inventor Kunal Garg
Kunal Garg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20260230064Abstract: In an implementation, a clock latch system may include a front-end circuit configured to receive and process input signals. The clock latch system may also include a latch circuit connected to the front-end circuit and configured to store a state of a processed signal. The clock latch system may also include an output driver circuit connected to the latch circuit. The clock latch system may also include test enable signals coupled to at least one of the latch circuit or the output driver circuit. The clock latch system may also include a clock generation circuit connected to the latch circuit.Type: ApplicationFiled: January 31, 2025Publication date: August 6, 2026Inventors: Deepesh John, Sundararajan Rangarajan, Teja Singh, Christopher S. Oliver, Kunal Garg, Nitin Kumar, Siddhesh Mhambrey, Shravan Lakshman
-
Publication number: 20260186053Abstract: In an implementation, a self-gating system includes a front-end circuit configured to generate an enable output based on input data signals corresponding to multiple flip-flop bits, a latch circuit coupled to the front-end circuit and configured to receive the enable output, an output driver circuit coupled to the latch circuit and configured to generate a gated clock signal, and a flip-flop circuit coupled to the output driver circuit and configured to receive the gated clock signal, wherein the flip-flop circuit includes multiple flip-flops corresponding to the multiple flip-flop bits.Type: ApplicationFiled: December 30, 2024Publication date: July 2, 2026Inventors: Nitin Kumar, Deepesh John, Shravan Lakshman, Kunal Garg, Siddhesh Mhambrey, Teja Singh, Sundararajan Rangarajan, Christopher S. Oliver, Pragatheswaran Manickam, Harshit Patel
-
Patent number: 11668714Abstract: A solid support for detecting the presence of antibodies in a biological sample, where the solid support includes microbial antigens immobilized on the solid support, wherein the microbial antigens include at least one antigen prepared from the group consisting of pleomorphic round bodies of Borrelia genus, for example Borrelia burgdorferi, Borrelia afzelii and Borrelia garinii. Also, a method of detecting a tick-borne microbe in a biological sample, wherein the solid support is contacted with a biological sample.Type: GrantFiled: May 24, 2022Date of Patent: June 6, 2023Assignee: Te?ted OyInventors: Leona Gilbert, Kunal Garg, Leena Meriläinen, Kanoktip Puttaraksa
-
Publication number: 20220357323Abstract: A solid support for detecting the presence of antibodies in a biological sample, where the solid support includes microbial antigens immobilized on the solid support, wherein the microbial antigens include at least one antigen prepared from the group consisting of pleomorphic round bodies of Borrelia genus, for example Borrelia burgdorferi, Borrelia afzelii and Borrelia garinii. Also, a method of detecting a tick-borne microbe in a biological sample, wherein the solid support is contacted with a biological sample.Type: ApplicationFiled: May 24, 2022Publication date: November 10, 2022Applicant: Te?ted OyInventors: Leona GILBERT, Kunal Garg, Leena Meriläinen, Kanoktip Puttaraksa
-
Patent number: 11353455Abstract: A solid support for detecting the presence of antibodies in a biological sample, where the solid support includes microbial antigens immobilized on the solid support, wherein the microbial antigens include at least one antigen prepared from the group consisting of pleomorphic round bodies of Borrelia genus, for example Borrelia burgdorferi, Borrelia afzelii and Borrelia garinii. Also, a method of detecting a tick-borne microbe in a biological sample, wherein the solid support is contacted with a biological sample.Type: GrantFiled: April 27, 2017Date of Patent: June 7, 2022Assignee: Te?ted OyInventors: Leona Gilbert, Kunal Garg, Leena Meriläinen, Kanoktip Puttaraksa
-
Publication number: 20190128887Abstract: A solid support for detecting the presence of antibodies in a biological sample, where the solid support includes microbial antigens immobilized on the solid support, wherein the microbial antigens include at least one antigen prepared from the group consisting of pleomorphic round bodies of Borrelia genus, for example Borrelia burgdorferi, Borrelia afzelii and Borrelia garinii. Also, a method of detecting a tick-borne microbe in a biological sample, wherein the solid support is contacted with a biological sample.Type: ApplicationFiled: April 27, 2017Publication date: May 2, 2019Inventors: LEONA GILBERT, Kunal Garg, Leena Meriläinen, Kanoktip Puttaraksa
-
Patent number: 9548089Abstract: An asynchronous memory includes a memory array, a sense amplifier, an output latch, and a controller. In response to a clock signal from an external circuit requesting a read operation, the controller provides the clock signal to the memory array to read data, and controls the sense amplifier and the output latch to provide the functionality of a flip-flop master and slave so that the read operation delay through the output latch to the external circuit is removed from a first read cycle of two sequential read cycles.Type: GrantFiled: June 18, 2015Date of Patent: January 17, 2017Assignee: QUALCOMM IncorporatedInventors: Stephen Edward Liles, Satendra Kumar Maurya, Kunal Garg, Chiaming Chai, Chintan Shah
-
Publication number: 20160293234Abstract: An asynchronous memory includes a memory array, a sense amplifier, an output latch, and a controller. In response to a clock signal from an external circuit requesting a read operation, the controller provides the clock signal to the memory array to read data, and controls the sense amplifier and the output latch to provide the functionality of a flip-flop master and slave so that the read operation delay through the output latch to the external circuit is removed from a first read cycle of two sequential read cycles.Type: ApplicationFiled: June 18, 2015Publication date: October 6, 2016Inventors: Stephen Edward LILES, Satendra Kumar MAURYA, Kunal GARG, Chiaming CHAI, Chintan SHAH
-
Publication number: 20160048791Abstract: Configuration information, indicating how a computing system process is configured, is analyzed to obtain calculated metrics and recommendations for improving the process. The calculated metrics and recommendations are surfaced on a user interface display, along with user input mechanisms that can be actuated to take action in order to implement one or more of the recommendations. If a user input mechanism is actuated, the corresponding action is performed to modify the process to implement the recommendation, and the process display is updated to show the modification.Type: ApplicationFiled: August 13, 2014Publication date: February 18, 2016Inventors: Palak Kadakia, Karan Srivastava, Kunal Garg, Nirav Shah, Shashi Ranjan
-
Patent number: 9152966Abstract: A data reporting framework that works across on-premise and hosted Customer Relationship Management (CRM) platforms enabling definition and execution of secure custom reports is provided. A fetch query language of a CRM platform is used along with reporting service tools and constructs to enable users to upload and execute custom fetch based reports with support for expressions, code, formatting, and drill through. Users are also enabled to build simple reports from within CRM and, if needed, enhance those reports using reporting service tools and re-upload in CRM. Furthermore, custom reports may be executed in a sandboxed environment to provide full security in a multi-tenant, hosted CRM system.Type: GrantFiled: May 3, 2011Date of Patent: October 6, 2015Assignee: Microsoft Technology Licensing, LLCInventors: Abhijit Gore, Abhishek Agarwal, Kunal Garg, Ramani Jagadeba, Ankit Malpani, Adithya Vishwanath, Kulothungan Rajasekaran, Manjeet Bothra, Andrew Miller, David Shutt, Edward Martinez
-
Patent number: 9007817Abstract: Embodiments disclosed herein include methods and apparatuses for pre-charging bitlines in a static random access memory (SRAM) prior to data access for reducing leakage power. The memory access logic circuit receives a memory access request comprising a data entry address to be accessed in a first data access path of a SRAM data array of the SRAM. The SRAM also includes a pre-charge circuit provided in a second data access path outside the first data access path. The pre-charge circuit is configured to enable pre-charging of the SRAM data array as part of the memory access request to avoid pre-charging bitlines in the SRAM data array during idle periods to reduce leakage power. The pre-charge circuit can enable pre-charging of the SRAM data array prior to data access such that the pre-charge circuit does not add latency to the first data access path.Type: GrantFiled: October 9, 2013Date of Patent: April 14, 2015Assignee: QUALCOMM IncorporatedInventors: Chiaming Chai, Shaoping Ge, Stephen Edward Liles, Kunal Garg
-
Publication number: 20150088971Abstract: A system has actions that are performed on one or more clients, and other actions that are performed on a server. The computer system provides user input mechanisms that receive user inputs for customizing the computer system. A model of a customized process within the computing system is captured. Both server side and client side customizations are captured in a single process definition. The definition is stored and can be run later as is or as translated into an appropriate representation.Type: ApplicationFiled: February 7, 2014Publication date: March 26, 2015Applicant: Microsoft CorporationInventors: Subramanian Janardanan, Kunal Garg, Shashi Ranjan, Nirav Shah
-
Publication number: 20140328113Abstract: Embodiments disclosed herein include methods and apparatuses for pre-charging bitlines in a static random access memory (SRAM) prior to data access for reducing leakage power. The memory access logic circuit receives a memory access request comprising a data entry address to be accessed in a first data access path of a SRAM data array of the SRAM. The SRAM also includes a pre-charge circuit provided in a second data access path outside the first data access path. The pre-charge circuit is configured to enable pre-charging of the SRAM data array as part of the memory access request to avoid pre-charging bitlines in the SRAM data array during idle periods to reduce leakage power. The pre-charge circuit can enable pre-charging of the SRAM data array prior to data access such that the pre-charge circuit does not add latency to the first data access path.Type: ApplicationFiled: October 9, 2013Publication date: November 6, 2014Applicant: QUALCOMM IncorporatedInventors: Chiaming Chai, Shaoping Ge, Stephen Edward Liles, Kunal Garg
-
Publication number: 20120284312Abstract: A data reporting framework that works across on-premise and hosted Customer Relationship Management (CRM) platforms enabling definition and execution of secure custom reports is provided. A fetch query language of a CRM platform is used along with reporting service tools and constructs to enable users to upload and execute custom fetch based reports with support for expressions, code, formatting, and drill through. Users are also enabled to build simple reports from within CRM and, if needed, enhance those reports using reporting service tools and re-upload in CRM. Furthermore, custom reports may be executed in a sandboxed environment to provide full security in a multi-tenant, hosted CRM system.Type: ApplicationFiled: May 3, 2011Publication date: November 8, 2012Applicant: Microsoft CorporationInventors: Abhijit Gore, Abhishek Agarwal, Kunal Garg, Ramani Jagadeba, Ankit Malpani, Adithya Vishwanath, Kulothungan Rajasekaran, Manjeet Bothra, Andrew Miller, David Shutt, Edward Martinez