Abstract: A photovoltaic device includes first and second photovoltaic cells, with each of the first and second photovoltaic cells having a substrate, a lower electrode disposed above the substrate along a deposition axis and that includes a conductive light transmissive layer, one or more semiconductor layers disposed above the substrate along the deposition axis, and an upper electrode disposed above the one or more semiconductor layers along the deposition axis. The semiconductor layers convert incident light into an electric current. The first and second photovoltaic cells are separated by first and second separation gaps. The first separation gap extend along the deposition axis through the lower electrode from the substrate and the second separation gap extends from a deposition surface of the light transmissive layer of the lower electrode and through a remainder of the lower electrode and the one or more semiconductor layers along the deposition axis.

Abstract: A photovoltaic module that converts incident light received through a light transmissive cover sheet into a voltage is provided. The photovoltaic module includes a substrate, conductive upper and lower layers between the substrate and the cover sheet, and a semiconductor layer stack between the conductive upper and lower layers. The conductive lower layer includes an electrode diffusion layer between a lower electrode and a conductive light transmissive layer. The electrode diffusion layer restricts diffusion of the lower electrode of the conductive lower layer into the conductive light transmissive layer during deposition of the semiconductor layer stack. The incident light is converted by the semiconductor layer stack into the voltage potential between the conductive upper and lower layers.

Abstract: The present invention relates to a thin film transistor, a method thereof and an organic light emitting device including the thin film transistor. According to an embodiment of the present invention, the thin film transistor includes a substrate, a control electrode, an insulating layer, a first electrode and a second electrode, a first ohmic contact layer and a second ohmic contact layer, and a semiconductor layer. The control electrode is formed on the substrate, and the insulating layer is formed on the control electrode. The first and the second electrodes are formed on the insulating layer. The first ohmic contact layer and the second ohmic contact layer are formed on the first electrode and the second electrode. The semiconductor layer is formed on the first ohmic contact layer and the second ohmic contact layer to fill between the first and the second electrodes.

Abstract: A method of manufacturing a photovoltaic module is provided. The method includes providing an electrically insulating substrate and a lower electrode, depositing a lower stack of silicon layers above the lower electrode, and depositing an upper stack of silicon layers above the lower stack. The lower and upper stacks include N-I-P junctions. The lower stack has an energy band gap of at least 1.60 eV while the upper stack has an energy band gap of at least 1.80 eV. The method also includes providing an upper electrode above the upper stack. The lower and upper stacks convert incident light into an electric potential between the upper and lower electrodes with the lower and upper stacks converting different portions of the light into the electric potential based on wavelengths of the light.

Abstract: A monolithically-integrated photovoltaic module is provided. The module includes an electrically insulating substrate, a lower stack of microcrystalline silicon layers above the substrate, a middle stack of amorphous silicon layers above the lower stack, an upper stack of amorphous silicon layers above the middle stack, and a light transmissive cover layer above the upper stack. An energy band gap of each of the lower, middle and upper stacks differs from one another such that a different spectrum of incident light is absorbed by each of the lower, middle and upper stacks.

Abstract: A monolithically-integrated photovoltaic module is provided. The module includes an insulating substrate and a lower electrode above the substrate. The method also includes a lower stack of microcrystalline silicon layers above the lower electrode, an upper stack of amorphous silicon layers above the lower stack, and an upper electrode above the upper stack. The upper and lower stacks of silicon layers have different energy band gaps. The module also includes a built-in bypass diode vertically extending in the upper and lower stacks of silicon layers from the lower electrode to the upper electrode. The built-in bypass diode includes portions of the lower and upper stacks that have a greater crystalline portion than a remainder of the lower and upper stacks.

Abstract: A method of manufacturing a silicon layer includes pretreating a surface of a silicon nitride layer formed on a substrate through a plasma enhanced chemical vapor deposition method using a first reaction gas including at least one of silicone tetrafluoride (SiF4) gas, a nitrogen trifluoride (NF3) gas, SiF4—H2 gas and a mixture thereof. Then, a silicon layer is formed on the pretreated silicon nitride layer through the plasma enhanced chemical vapor deposition method using a second reaction gas including a mixture of gas including silicon tetrafluoride (SiF4), hydrogen (H2) and argon (Ar).

Abstract: The present invention relates to a thin film transistor, a method thereof and an organic light emitting device including the thin film transistor. According to an embodiment of the present invention, the thin film transistor includes a substrate, a control electrode, an insulating layer, a first electrode and a second electrode, a first ohmic contact layer and a second ohmic contact layer, and a semiconductor layer. The control electrode is formed on the substrate, and the insulating layer is formed on the control electrode. The first and the second electrodes are formed on the insulating layer. The first ohmic contact layer and the second ohmic contact layer are formed on the first electrode and the second electrode. The semiconductor layer is formed on the first ohmic contact layer and the second ohmic contact layer to fill between the first and the second electrodes.

Abstract: A method of manufacturing a silicon layer includes pretreating a surface of a silicon nitride layer formed on a substrate through a plasma enhanced chemical vapor deposition method using a first reaction gas including at least one of silicone tetrafluoride (SiF4) gas, a nitrogen trifluoride (NF3) gas, SiF4—H2 gas and a mixture thereof Then, a silicon layer is formed on the pretreated silicon nitride layer through the plasma enhanced chemical vapor deposition method using a second reaction gas including a mixture of gas including silicon tetrfluoride (SiF4), hydrogen (H2) and argon (Ar),

Abstract: Provided are a thin film transistor (TFT) substrate and a method for manufacturing the same. The method comprises forming on a substrate a conductive layer, an impurity-doped silicon layer, and an intermediate layer, wherein the intermediate layer comprises intrinsic silicon; patterning the intermediate layer, the impurity-doped silicon layer, and the conductive layer to form a data line, a source electrode, a drain electrode, ohmic contact portions, and intermediate portions, wherein an ohmic contact portion and an intermediate portion are on the source electrode, and an ohmic contact portion and an intermediate portion are on the drain electrode; forming an intrinsic silicon layer on the substrate; and patterning the intrinsic silicon layer to form a semiconductor layer forming channel portion between the source electrode and the drain electrode, and a contact portion on the intermediate portion.

Abstract: A TFT array panel including a substrate, a gate line having a gate electrode, a gate insulating layer formed on the gate line, a data line having a source electrode and a drain electrode spaced apart from the source electrode, a passivation layer formed on the data line and the drain electrode, and a pixel electrode connected to the drain electrode is provided. The TFT array panel further includes a protection layer including Si under at least one of the gate insulating layer and the passivation layer to enhance reliability.