Patents by Inventor Kuniaki Sugiura

Kuniaki Sugiura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230298647
    Abstract: According to one embodiment, a memory device includes: a first memory cell; a second memory cell; a first circuit configured to supply a write current to the first memory cell and the second memory cell; a first wiring coupled to the first circuit; a first electrode configured to electrically couple the first memory cell to the first wiring; and a second electrode configured to electrically couple the second memory cell to the first wiring. A length of the first wiring from the first circuit to the first electrode is smaller than a length of the first wiring from the first circuit to the second electrode. A resistance value of the first electrode is higher than a second resistance value of the second electrode.
    Type: Application
    Filed: June 17, 2022
    Publication date: September 21, 2023
    Applicant: Kioxia Corporation
    Inventors: Kuniaki SUGIURA, Taichi IGARASHI
  • Publication number: 20220085282
    Abstract: According to one embodiment, a magnetic memory device includes a first magnetoresistance effect element provided above a substrate, a first switching element member, and a first conductor. Each of the first switching element member and the first conductor is provided above the first magnetoresistance effect element. The first switching element member includes a first portion in contact with a lower surface of the first conductor directly above the first magnetoresistance effect element. An area of a lower surface of the first switching element member is smaller than a cross-sectional area of the first switching element member along the lower surface of the first conductor.
    Type: Application
    Filed: March 11, 2021
    Publication date: March 17, 2022
    Applicant: Kioxia Corporation
    Inventor: Kuniaki SUGIURA
  • Patent number: 10304509
    Abstract: According to an embodiment, a magnetic storage device includes a memory cell including a magnetoresistive element, a selector, a first end, and a second end. The magnetoresistive element includes a first ferromagnetic layer, a second ferromagnetic layer, a third ferromagnetic layer, a first nonmagnetic layer disposed between the first ferromagnetic layer and the second ferromagnetic layer, and a second nonmagnetic layer disposed between the second ferromagnetic layer and the third ferromagnetic layer to couple the second ferromagnetic layer with the third ferromagnetic layer in an antiferromagnetic manner. The first ferromagnetic layer has a film thickness larger than a film thickness of the second ferromagnetic layer.
    Type: Grant
    Filed: September 12, 2017
    Date of Patent: May 28, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Masatoshi Yoshikawa, Kuniaki Sugiura
  • Patent number: 10305025
    Abstract: A magnetic memory device including a first magnetic layer selectively exhibiting a first state in which the first magnetic layer has a first magnetization direction perpendicular to a main surface thereof and a second state in which the first magnetic layer has a second magnetization direction opposite to the first magnetization direction; a second magnetic layer having a fixed magnetization direction which is perpendicular to a main surface thereof and which corresponds to the first magnetization direction, and having a top surface including a recess portion or a bottom surface including a recess portion; a third magnetic layer provided between the first magnetic layer and the second magnetic layer, and having a fixed magnetization direction which is perpendicular to a main surface thereof and which corresponds to the second magnetization direction; and a nonmagnetic layer provided between the first magnetic layer and the third magnetic layer.
    Type: Grant
    Filed: December 21, 2017
    Date of Patent: May 28, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Jyunichi Ozeki, Hiroyuki Ohtori, Kuniaki Sugiura, Yutaka Hashimoto, Katsuya Nishiyama
  • Patent number: 10128310
    Abstract: According to one embodiment, a magnetoresistive memory device includes a magnetoresistive element of a stacked layer structure includes a first magnetic layer, a second magnetic layer, and a nonmagnetic layer between the first and second magnetic layers, and an insulating layer of a group III-V compound provided on a side of the first magnetic layer of the magnetoresistive element, the insulating layer including an chemical element of group II, group IV, or group VI.
    Type: Grant
    Filed: September 9, 2016
    Date of Patent: November 13, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Kuniaki Sugiura
  • Publication number: 20180261270
    Abstract: According to an embodiment, a magnetic storage device includes a memory cell including a magnetoresistive element, a selector, a first end, and a second end. The magnetoresistive element includes a first ferromagnetic layer, a second ferromagnetic layer, a third ferromagnetic layer, a first nonmagnetic layer disposed between the first ferromagnetic layer and the second ferromagnetic layer, and a second nonmagnetic layer disposed between the second ferromagnetic layer and the third ferromagnetic layer to couple the second ferromagnetic layer with the third ferromagnetic layer in an antiferromagnetic manner. The first ferromagnetic layer has a film thickness larger than a film thickness of the second ferromagnetic layer.
    Type: Application
    Filed: September 12, 2017
    Publication date: September 13, 2018
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Masatoshi YOSHIKAWA, Kuniaki SUGIURA
  • Patent number: 10043853
    Abstract: According to one embodiment, a magnetic memory device includes a first insulating film provided on a semiconductor region, and having a portion located in a memory cell array area and thicker than a portion located in a peripheral circuit area, a plurality of conductive plugs located in the memory cell array area and provided in the first insulating film, stacked structures located in the memory cell array area, provided on the conductive plugs, and each having layers including a magnetic layer, and transistors located in the peripheral circuit area, and each including a gate electrode provided on the semiconductor region and covered with the first insulating film, wherein a thickness t0 from a main surface of the semiconductor region to a lower surface of each stacked structure is greater than a predetermined value.
    Type: Grant
    Filed: March 20, 2017
    Date of Patent: August 7, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Kuniaki Sugiura, Masahiko Hasunuma, Masatoshi Yoshikawa
  • Publication number: 20180114897
    Abstract: A magnetic memory device including a first magnetic layer selectively exhibiting a first state in which the first magnetic layer has a first magnetization direction perpendicular to a main surface thereof and a second state in which the first magnetic layer has a second magnetization direction opposite to the first magnetization direction; a second magnetic layer having a fixed magnetization direction which is perpendicular to a main surface thereof and which corresponds to the first magnetization direction, and having a top surface including a recess portion or a bottom surface including a recess portion; a third magnetic layer provided between the first magnetic layer and the second magnetic layer, and having a fixed magnetization direction which is perpendicular to a main surface thereof and which corresponds to the second magnetization direction; and a nonmagnetic layer provided between the first magnetic layer and the third magnetic layer.
    Type: Application
    Filed: December 21, 2017
    Publication date: April 26, 2018
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Jyunichi OZEKI, Hiroyuki OHTORI, Kuniaki SUGIURA, Yutaka HASHIMOTO, Katsuya NISHIYAMA
  • Publication number: 20180076263
    Abstract: According to one embodiment, a magnetic memory device includes a first insulating film provided on a semiconductor region, and having a portion located in a memory cell array area and thicker than a portion located in a peripheral circuit area, a plurality of conductive plugs located in the memory cell array area and provided in the first insulating film, stacked structures located in the memory cell array area, provided on the conductive plugs, and each having layers including a magnetic layer, and transistors located in the peripheral circuit area, and each including a gate electrode provided on the semiconductor region and covered with the first insulating film, wherein a thickness t0 from a main surface of the semiconductor region to a lower surface of each stacked structure is greater than a predetermined value.
    Type: Application
    Filed: March 20, 2017
    Publication date: March 15, 2018
    Applicant: Toshiba Memory Corporation
    Inventors: Kuniaki SUGIURA, Masahiko HASUNUMA, Masatoshi YOSHIKAWA
  • Patent number: 9893121
    Abstract: According to one embodiment, a magnetic memory includes a first metal layer including a first metal, a second metal layer on the first metal layer, the second metal layer including a second metal which is more easily oxidized than the first metal, the second metal layer having a first sidewall portion which contacts the first metal layer, and the second metal layer having a second sidewall portion above the first sidewall portion, the second sidewall portion which steps back from the first sidewall portion, a magnetoresistive element on the second metal layer, a third metal layer on the magnetoresistive element, and a first material which contacts a sidewall portion of the magnetoresistive element and the second sidewall portion of the second metal layer, the first material including an oxide of the second metal.
    Type: Grant
    Filed: September 6, 2016
    Date of Patent: February 13, 2018
    Assignees: Toshiba Memory Corporation, SK Hynix, Inc.
    Inventors: Yasuyuki Sonoda, Masahiko Nakayama, Min Suk Lee, Masatoshi Yoshikawa, Kuniaki Sugiura, Ji Hwan Hwang
  • Patent number: 9882119
    Abstract: According to one embodiment, a magnetic memory device includes a first magnetic layer selectively exhibiting a first state in which the first magnetic layer has a first magnetization direction perpendicular to a main surface thereof and a second state in which the first magnetic layer has a second magnetization direction opposite to the first magnetization direction, a second magnetic layer having a fixed magnetization direction perpendicular to a main surface thereof and corresponding to the first magnetization direction, a third magnetic layer provided between the first and second magnetic layers, having a fixed magnetization direction perpendicular to a main surface thereof and corresponding to the second magnetization direction, and having a side surface including a recess portion, and a nonmagnetic layer provided between the first and third magnetic layers.
    Type: Grant
    Filed: September 20, 2016
    Date of Patent: January 30, 2018
    Assignee: Toshiba Memory Corporation
    Inventors: Jyunichi Ozeki, Hiroyuki Ohtori, Kuniaki Sugiura, Yutaka Hashimoto, Katsuya Nishiyama
  • Publication number: 20170263677
    Abstract: According to one embodiment, a magnetoresistive memory device includes a magnetoresistive element of a stacked layer structure includes a first magnetic layer, a second magnetic layer, and a nonmagnetic layer between the first and second magnetic layers, and an insulating layer of a group III-V compound provided on a side of the first magnetic layer of the magnetoresistive element, the insulating layer including an chemical element of group II, group IV, or group VI.
    Type: Application
    Filed: September 9, 2016
    Publication date: September 14, 2017
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Kuniaki SUGIURA
  • Publication number: 20170263852
    Abstract: According to one embodiment, a magnetic memory device includes a first magnetic layer selectively exhibiting a first state in which the first magnetic layer has a first magnetization direction perpendicular to a main surface thereof and a second state in which the first magnetic layer has a second magnetization direction opposite to the first magnetization direction, a second magnetic layer having a fixed magnetization direction perpendicular to a main surface thereof and corresponding to the first magnetization direction, a third magnetic layer provided between the first and second magnetic layers, having a fixed magnetization direction perpendicular to a main surface thereof and corresponding to the second magnetization direction, and having a side surface including a recess portion, and a nonmagnetic layer provided between the first and third magnetic layers.
    Type: Application
    Filed: September 20, 2016
    Publication date: September 14, 2017
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Jyunichi OZEKI, Hiroyuki OHTORI, Kuniaki SUGIURA, Yutaka HASHIMOTO, Katsuya NISHIYAMA
  • Publication number: 20170069683
    Abstract: According to one embodiment, a magnetoresistive memory device includes a magnetoresistive element having a stacked layer structure includes a first magnetic layer, a second magnetic layer, and a nonmagnetic layer between the first magnetic layer and the second magnetic layer, an insulating layer provided on the first magnetic layer, a conductive layer provided on a surface of the insulating laver, opposite to the first magnetic layer, and a sidewall conductive film configure to connect the conductive layer and the first magnetic layer.
    Type: Application
    Filed: March 9, 2016
    Publication date: March 9, 2017
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Kuniaki SUGIURA
  • Patent number: 9590174
    Abstract: According to one embodiment, a manufacturing method of a magnetoresistive memory device includes forming a first magnetic layer on a substrate, forming a magnetoresistive effect element on the first magnetic layer, forming a mask on a part of the magnetoresistive effect element, selectively etching the magnetoresistive effect element using the mask, forming a sidewall insulating film on a sidewall of the magnetoresistive effect element exposed by the etching, selectively etching the first magnetic layer using the mask and the sidewall insulating film and forming a deposition layer containing a magnetic material on a sidewall of the first magnetic layer and the sidewall insulating film, and introducing ions into the deposition layer.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: March 7, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masaru Toko, Kuniaki Sugiura, Yutaka Hashimoto, Katsuya Nishiyama, Tadashi Kai
  • Publication number: 20160380028
    Abstract: According to one embodiment, a magnetic memory includes a first metal layer including a first metal, a second metal layer on the first metal layer, the second metal layer including a second metal which is more easily oxidized than the first metal, the second metal layer having a first sidewall portion which contacts the first metal layer, and the second metal layer having a second sidewall portion above the first sidewall portion, the second sidewall portion which steps back from the first sidewall portion, a magnetoresistive element on the second metal layer, a third metal layer on the magnetoresistive element, and a first material which contacts a sidewall portion of the magnetoresistive element and the second sidewall portion of the second metal layer, the first material including an oxide of the second metal.
    Type: Application
    Filed: September 6, 2016
    Publication date: December 29, 2016
    Applicants: KABUSHIKI KAISHA TOSHIBA, SK HYNIX INC.
    Inventors: Yasuyuki SONODA, Masahiko NAKAYAMA, Min Suk LEE, Masatoshi YOSHIKAWA, Kuniaki SUGIURA, Ji Hwan HWANG
  • Patent number: 9368717
    Abstract: According to one embodiment, a magnetoresistive element is disclosed. The magnetoresistive element includes a reference layer. The reference layer includes a first region, and a second region provided outside the first region to surround the same. The second region contains an element contained in the first region and another element being different from the element. The magnetoresistive element further includes a storage layer, and a tunnel barrier layer provided between the reference layer and the storage layer. The storage layer is free from the another element.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: June 14, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masaru Toko, Masahiko Nakayama, Kuniaki Sugiura, Yutaka Hashimoto, Tadashi Kai, Akiyuki Murayama, Tatsuya Kishi
  • Publication number: 20160104834
    Abstract: According to one embodiment, a manufacturing method of a magnetoresistive memory device includes forming a first magnetic layer on a substrate, forming a magnetoresistive effect element on the first magnetic layer, forming a mask on a part of the magnetoresistive effect element, selectively etching the magnetoresistive effect element using the mask, forming a sidewall insulating film on a sidewall of the magnetoresistive effect element exposed by the etching, selectively etching the first magnetic layer using the mask and the sidewall insulating film and forming a deposition layer containing a magnetic material on a sidewall of the first magnetic layer and the sidewall insulating film, and introducing ions into the deposition layer.
    Type: Application
    Filed: February 23, 2015
    Publication date: April 14, 2016
    Inventors: Masaru TOKO, Kuniaki SUGIURA, Yutaka HASHIMOTO, Katsuya NISHIYAMA, Tadashi KAI
  • Patent number: 9276195
    Abstract: According to one embodiment, a magnetic random access memory includes a magnetoresistive element, a contact arranged under the magnetoresistive element and connected to the magnetoresistive element, and an insulating film continuously formed from a periphery of the contact to a side surface of the magnetoresistive element and including a protective portion covering the side surface of the magnetoresistive element.
    Type: Grant
    Filed: August 12, 2013
    Date of Patent: March 1, 2016
    Inventors: Hiroyuki Kanaya, Kuniaki Sugiura
  • Patent number: 9231196
    Abstract: According to one embodiment, a magnetoresistive element is disclosed. The element includes a lower electrode, a stacked body provided on the lower electrode and including a first magnetic layer, a tunnel barrier layer and a second magnetic layer. The first magnetic layer is under the tunnel barrier layer, the second magnetic layer is on the tunnel barrier layer. The first magnetic layer includes a first region and a second region outside the first region to surround the first region. The second region includes an element in the first region and other element being different from the element.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: January 5, 2016
    Inventors: Kuniaki Sugiura, Tadashi Kai