Patents by Inventor Kunihiko Nagase

Kunihiko Nagase has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080176404
    Abstract: The method for fabricating the semiconductor device comprises the step of forming an insulating film 14 having an opening 18; the step of forming an organic resist film 20a; the step of forming over the organic resist film 20a a mask film 20b having etching characteristics different from those of the organic resist film 20a; the step of forming an opening in the mask film 20b; and the step of etching the organic resist film 20a with the mask film 20b as the mask. In the step of etching the organic resist film, the organic resist film 20a is etched with a mixed gas of nitrogen gas and oxygen gas.
    Type: Application
    Filed: October 17, 2007
    Publication date: July 24, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Kunihiko Nagase, Akihiro Hasegawa
  • Publication number: 20070111505
    Abstract: A semiconductor device manufacturing method forming an interconnection structure by a dual damascene process is disclosed that includes the steps of forming first and second interlayer insulating films successively over an interconnection layer, at least one of which includes a low dielectric constant material; forming a via hole through the first and second interlayer insulating films; filling the via hole with a burying material including an acid generator; causing an acid substance to be generated in the burying material; forming a chemically amplified resist film covering the second interlayer insulating film and the burying material; forming the pattern of an interconnection trench in the area including the via hole over the chemically amplified resist film; forming the interconnection trench by etching the second interlayer insulating film using the chemically amplified resist film as a mask; and filling the via hole and the interconnection trench with a conductive material.
    Type: Application
    Filed: February 17, 2006
    Publication date: May 17, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Michio Oryoji, Kunihiko Nagase
  • Publication number: 20060134909
    Abstract: The method for fabricating the semiconductor device comprises the step of forming an insulating film 14 having an opening 18; the step of forming an organic resist film 20a; the step of forming over the organic resist film 20a a mask film 20b having etching characteristics different from those of the organic resist film 20a; the step of forming an opening in the mask film 20b; and the step of etching the organic resist film 20a with the mask film 20b as the mask. In the step of etching the organic resist film, the organic resist film 20a is etched with a mixed gas of nitrogen gas and oxygen gas.
    Type: Application
    Filed: April 5, 2004
    Publication date: June 22, 2006
    Applicant: Fujitsu Limited
    Inventors: Kunihiko Nagase, Akihiro Hasegawa
  • Patent number: 6136723
    Abstract: A method of fabricating a semiconductor device includes the steps of forming a resist pattern on a conductor layer, exposing the resist pattern to any of a plasma of a rare gas, a plasma of a mixture of a rare gas and a fluorine-containing gas, and a plasma of N.sub.2, and applying a dry etching process to the conductor layer while using the resist pattern as a mask.
    Type: Grant
    Filed: May 26, 1999
    Date of Patent: October 24, 2000
    Assignee: Fujitsu Limited
    Inventor: Kunihiko Nagase
  • Patent number: 6044850
    Abstract: Ashing process of a resist pattern used in a semiconductor device manufacturing method is conducted by exposing the resist, the wirings, and their peripheral regions to a first atmosphere which includes a first product obtained by plasmanizing a gas containing water at a rate of more than 30 flow rate %, and placing the resist in a second atmosphere which includes a second product obtained by plasmanizing an oxygen mixed gas which contains an oxygen gas as a principal component before or after or before and after the exposing step.
    Type: Grant
    Filed: October 30, 1997
    Date of Patent: April 4, 2000
    Assignee: Fujitsu Limited
    Inventors: Soichiro Ozawa, Satoru Mihara, Kunihiko Nagase, Masaaki Aoyama, Naoki Nishida