Abstract: A secondary battery includes: a solid electrolyte layer including at least one of water (H2O) and a hydroxyl group (—OH); a positive-electrode active material layer disposed on the solid electrolyte layer and including nickel hydroxide; a second electrode (positive electrode) disposed on the positive-electrode active material layer; a negative-electrode active material layer disposed on a lower surface of the solid electrolyte layer so as to be opposite to the positive-electrode active material layer, and including a titanium oxide compound (TiOx) including at least one of water and a hydroxyl group; a first electrode (negative electrode) disposed on a lower surface of the negative-electrode active material layer so as to be opposite to the second electrode; a p type semiconductor layer disposed between the positive-electrode active material layer and the second electrode; and an n type semiconductor layer disposed between the negative-electrode active material layer and the first electrode.

Abstract: A malfunction detection system is provided that can continue or terminate processing appropriately even if a malfunction occurs in an information processing unit. In this regard, the information processing unit receives branch direction information, carries out a conditional branch depending on the branch direction information, and performs an applicable operation on data I. At this time, the information processing unit performs an applicable operation on data J, other than the operated data I, in the conditional branch path and outputs the result for examination, thereby enabling validation of the conditional branch.

Abstract: The present invention relates to the improvement of the Bit Torrent protocol, which is one of the P2P protocols. A seeder flag is added to the active peer table. First a super seeder having the original is activated, and the super seeder is stopped when the total value of the seeder flags (number of activated seeders) reaches a certain level. The super seeders are activated only when the seeders having the original of a file are insufficient on the network, and are stopped when excessive. By this dynamic control, the number of activated processes of the super seeders can be decreased.

Abstract: An object of the present invention is to prevent secret information that is being internally processed from being inferred through operational information of a secured device, including the current consumption information. One solution is provided by an information processing device having at least a key generation apparatus that generates key data automatically, an encryption unit that encrypts data with the corresponding key data, a register that stores a plurality of encrypted data items with the corresponding encryption key data items, and an arithmetic unit that performs operations using data expressed with the corresponding encryption key data and new key data as the input, encrypts the operation result with new input key data, and outputs the result, thereby being capable of performing internal processing on an encrypted data expression. Accordingly, only encrypted data is transferred on the internal or external data bus line.

Abstract: The present invention relates to the improvement of the Bit Torrent protocol, which is one of the P2P protocols. A seeder flag is added to the active peer table. First a super seeder having the original is activated, and the super seeder is stopped when the total value of the seeder flags (number of activated seeders) reaches a certain level. The super seeders are activated only when the seeders having the original of a file are insufficient on the network, and are stopped when excessive. By this dynamic control, the number of activated processes of the super seeders can be decreased.

Abstract: It is a technological object of the present invention to provide an information processing device, a card and a card system that have a high level of security. In order to achieve the object described above, the present invention provides a data processing apparatus comprising at least a first information processing device and a second information processing device connected to the first information processing device by a signal line, the data processing apparatus having a means for changing power consumption on the signal line during transmission of a signal through the signal line in accordance with an actual state of the power consumption that would be observed when the means were not used.

Abstract: Disclosed herein are an IC card and a microcomputer which have implemented the strengthening of security and the speeding up and enhancement of signal processing for the security. In an IC card, which is supplied with an operating voltage by an electrical connection between each of external terminals and a read/write device, and includes an input-output operation of data with an encoding process or a decoding process, a disturbance-aimed processing operation is included in the encoding process or decoding process to uniformalize timings provided to operate an internal circuit and its operating current. In a microcomputer having a module configuration including an input-output operation of data with an encoding process or a decoding process, a disturbance-aimed processing operation is included in the encoding process or decoding process to uniformalize timings provided to operate an internal circuit and its operating current.

Abstract: An object of the present invention is to prevent secret information that is being internally processed from being inferred through operational information of a secured device, including the current consumption information. One solution is provided by an information processing device having at least a key generation apparatus that generates key data automatically, an encryption unit that encrypts data with the corresponding key data, a register that stores a plurality of encrypted data items with the corresponding encryption key data items, and an arithmetic unit that performs operations using data expressed with the corresponding encryption key data and new key data as the input, encrypts the operation result with new input key data, and outputs the result, thereby being capable of performing internal processing on an encrypted data expression. Accordingly, only encrypted data is transferred on the internal or external data bus line.

Abstract: An object of the present invention is to prevent secret information that is being internally processed from being inferred through operational information of a secured device, including the current consumption information. One solution is provided by an information processing device having at least a key generation apparatus that generates key data automatically, an encryption unit that encrypts data with the corresponding key data, a register that stores a plurality of encrypted data items with the corresponding encryption key data items, and an arithmetic unit that performs operations using data expressed with the corresponding encryption key data and new key data as the input, encrypts the operation result with new input key data, and outputs the result, thereby being capable of performing internal processing on an encrypted data expression. Accordingly, only encrypted data is transferred on the internal or external data bus line.

Abstract: An object of the present invention is to prevent secret information that is being internally processed from being inferred through operational information of a secured device, including the current consumption information. One solution is provided by an information processing device having at least a key generation apparatus that generates key data automatically, an encryption unit that encrypts data with the corresponding key data, a register that stores a plurality of encrypted data items with the corresponding encryption key data items, and an arithmetic unit that performs operations using data expressed with the corresponding encryption key data and new key data as the input, encrypts the operation result with new input key data, and outputs the result, thereby being capable of performing internal processing on an encrypted data expression. Accordingly, only encrypted data is transferred on the internal or external data bus line.

Abstract: A malfunction detection system that can continue or terminate processing appropriately even if a malfunction occurs in an information processing unit; wherein an information processing unit receives branch direction information, carries out a conditional branch depending on the branch direction information, and performs an applicable operation on data I; at this time, the information processing unit performs an applicable operation on data J other than the operated data I in the conditional branch path and outputs the result for examination, thereby enabling validation of the conditional branch.

Abstract: Disclosed herein are an IC card and a microcomputer which have implemented the strengthening of security and the speeding up and enhancement of signal processing for the security. In an IC card, which is supplied with an operating voltage by an electrical connection between each of external terminals and a read/write device, and includes an input-output operation of data with an encoding process or a decoding process, a disturbance-aimed processing operation is included in the encoding process or decoding process to uniformalize timings provided to operate an internal circuit and its operating current. In a microcomputer having a module configuration including an input-output operation of data with an encoding process or a decoding process, a disturbance-aimed processing operation is included in the encoding process or decoding process to uniformalize timings provided to operate an internal circuit and its operating current.

Abstract: Disclosed herein are an IC card and a microcomputer which have implemented the strengthening of security and the speeding up and enhancement of signal processing for the security. In an IC card, which is supplied with an operating voltage by an electrical connection between each of external terminals and a read/write device, and includes an input-output operation of data with an encoding process or a decoding process, a disturbance-aimed processing operation is included in the encoding process or decoding process to uniformalize timings provided to operate an internal circuit and its operating current. In a microcomputer having a module configuration including an input-output operation of data with an encoding process or a decoding process, a disturbance-aimed processing operation is included in the encoding process or decoding process to uniformalize timings provided to operate an internal circuit and its operating current.

Abstract: In a microcomputer incorporating a microprocessor, the coprocessor having product-sum operation arithmetic units executes residue multiplications given by "A=A.multidot.B.multidot.R.sup.-1 mod N+kN", "A=A.sup.2 .multidot.R.sup.-1 mod N+kN" and "A=A.multidot.R.sup.-1 mod N 30 kN" and is provided with a multiplication function of executing a preprocessing "R.sup.2 mod N" at high speed. It is possible to perform a power-residue operation "X.sup.Y mod N" at high speed by the microprocessor, using these calculation functions of the coprocessor.

Abstract: An output gate means is provided which is capable of outputting individual signals selectively to an internal bus; the individual signals are interchanged among a plurality of functional modules connected to the internal bus which is interfaced with an external circuit. An input gate means is provided which is capable of supplying selectively a signal, input to the internal bus, to a specified functional module in place of an individual signal.

Abstract: A reception unit for providing data supplied from a serial input circuit to an inner bus and a transmission unit for providing the data supplied from the inner bus to a serial output circuit hold at least two sorts of control procedures among HDLC procedure, BI-SYNC procedure and start-stop synchronous procedure as control procedures for data transmission/reception, and the control procedures held by these units can be selected alternatively based on a command of the processor.

Abstract: A reception unit for providing data supplied from a serial input circuit to an inner bus and a transmission unit for providing the data supplied from the inner bus to a serial output circuit hold at least two types of control procedures selected from HDLC procedure, BI-SYNC procedure and start-stop synchronous procedure as control procedures for data transmission/reception, and the control procedures held by these units can be selected alternatively based on a mode control data written in a mode control register by a processor.

Abstract: A data processor controller for a microprogramming system is constructed with a single operation execution unit serving both a microprocessor and a peripheral device such as a direct memory access controller. In addition to the single operation execution unit, the controller includes a micro-memory which stores micro-instructions for controlling both the microprocessor and the peripheral device, and address registers, multiplexers and decoders integrated into a single device.