Patents by Inventor Kunihiro Matsuda

Kunihiro Matsuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160358548
    Abstract: A thin film transistor array device includes row blocks each including selection rows, each selection row having at least one element circuit including a thin film transistor, and an element selection line, and a row block selection circuit including row block selection lines each corresponding to a respective one of the row blocks such that all the element selection lines in the respective one of the row blocks are parallelly connected to a respective one of the row block selection lines. The row block selection circuit applies, to the row block selection lines one by one, a selection level for selecting one row block from the row blocks from outside. The row block selection circuit further includes a switching circuit that switches between the element selection line and the row block selection line to change between a conduction state and a non-conduction state simultaneously for all the element selection lines.
    Type: Application
    Filed: August 17, 2016
    Publication date: December 8, 2016
    Applicant: TOPPAN PRINTING CO., LTD.
    Inventor: Kunihiro MATSUDA
  • Patent number: 8692458
    Abstract: A light emitting device includes: a light emitting element including a first electrode, a second electrode opposed to the first electrode, and a light emitting layer provided between the first electrode and the second electrode; a capacitor having a third electrode formed in a position overlapping the light emitting element and an insulating layer provided between the first and third electrodes; a first drive transistor disposed on a first side of the first electrode and having a gate electrode; and a second drive transistor disposed on a second side of the first electrode and having a gate electrode connected to the gate electrode of the first drive transistor via the third electrode.
    Type: Grant
    Filed: September 27, 2011
    Date of Patent: April 8, 2014
    Assignee: Casio Computer Co., Ltd.
    Inventors: Hiroshi Matsumoto, Kunihiro Matsuda
  • Patent number: 8410482
    Abstract: Disclosed in a semiconductor device including a substrate, a first transistor, a second transistor, and a first source electrode and a first drain electrode of the first transistor are arranged along a first direction and a second source electrode and a second drain electrode of the second transistor are arranged in a reverse order of the first source electrode and the first drain electrode along the first direction, the first source electrode and the second source electrode are connected by a source connecting wiring, the first drain electrode and the second drain electrode are connected by a drain connecting wiring, a first gate electrode and a second gate electrode are connected by a gate connecting wiring and the source connecting wiring and the drain connecting wiring are provided at positions except a region overlapped with the first gate electrode, the second gate electrode and the gate connecting wiring.
    Type: Grant
    Filed: March 30, 2011
    Date of Patent: April 2, 2013
    Assignee: Casio Computer Co., Ltd.
    Inventors: Kunihiro Matsuda, Hiroshi Matsumoto, Yukikazu Tanaka
  • Publication number: 20120074409
    Abstract: A light emitting device includes: a light emitting element including a first electrode, a second electrode opposed to the first electrode, and a light emitting layer provided between the first electrode and the second electrode; a capacitor having a third electrode formed in a position overlapping the light emitting element and an insulating layer provided between the first and third electrodes; a first drive transistor disposed on a first side of the first electrode and having a gate electrode; and a second drive transistor disposed on a second side of the first electrode and having a gate electrode connected to the gate electrode of the first drive transistor via the third electrode.
    Type: Application
    Filed: September 27, 2011
    Publication date: March 29, 2012
    Applicant: CASIO COMPUTER CO., LTD.
    Inventors: Hiroshi MATSUMOTO, Kunihiro Matsuda
  • Patent number: 8130355
    Abstract: A liquid crystal display device includes a first substrate having a common electrode thereon; a second substrate coupled to the first substrate, the second substrate having a connection electrode facing a portion of the common electrode on the first substrate, the connection electrode including a lower electrode made of metal, an insulating layer formed over the lower electrode and having a plurality of contact holes, and an upper electrode made of oxide conductor over the insulating layer, the upper electrode being electrically connected to the lower electrode via the plurality of contact holes; and a plurality of conductive gap members disposed between said portion of the common electrode and the upper electrode of the connection electrode to electrically connect said portion of the common electrode to the upper electrode of the connection electrode.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: March 6, 2012
    Assignee: Casio Computer Co., Ltd.
    Inventors: Kunihiro Matsuda, Norihisa Yamada
  • Publication number: 20110241002
    Abstract: Disclosed in a semiconductor device including a substrate, a first transistor, a second transistor, and a first source electrode and a first drain electrode of the first transistor are arranged along a first direction and a second source electrode and a second drain electrode of the second transistor are arranged in a reverse order of the first source electrode and the first drain electrode along the first direction, the first source electrode and the second source electrode are connected by a source connecting wiring, the first drain electrode and the second drain electrode are connected by a drain connecting wiring, a first gate electrode and a second gate electrode are connected by a gate connecting wiring and the source connecting wiring and the drain connecting wiring are provided at positions except a region overlapped with the first gate electrode, the second gate electrode and the gate connecting wiring.
    Type: Application
    Filed: March 30, 2011
    Publication date: October 6, 2011
    Applicant: CASIO COMPUTER CO., LTD.
    Inventors: Kunihiro MATSUDA, Hiroshi Matsumoto, Yukikazu Tanaka
  • Publication number: 20110227081
    Abstract: A pixel circuit substrate includes: a pixel electrode; a first drive element connected to one side of the pixel electrode; a second drive element that is connected to the first drive element in parallel and also is connected to the other side opposite to the one side of the pixel electrode.
    Type: Application
    Filed: March 14, 2011
    Publication date: September 22, 2011
    Applicant: CASIO COMPUTER CO., LTD.
    Inventors: Kunihiro MATSUDA, Hiroshi Matsumoto, Yukikazu Tanaka
  • Publication number: 20100066966
    Abstract: A liquid crystal display device includes a first substrate having a common electrode thereon; a second substrate coupled to the first substrate, the second substrate having a connection electrode facing a portion of the common electrode on the first substrate, the connection electrode including a lower electrode made of metal, an insulating layer formed over the lower electrode and having a plurality of contact holes, and an upper electrode made of oxide conductor over the insulating layer, the upper electrode being electrically connected to the lower electrode via the plurality of contact holes; and a plurality of conductive gap members disposed between said portion of the common electrode and the upper electrode of the connection electrode to electrically connect said portion of the common electrode to the upper electrode of the connection electrode.
    Type: Application
    Filed: September 26, 2008
    Publication date: March 18, 2010
    Inventors: Kunihiro MATSUDA, Norihisa Yamada
  • Patent number: 5733420
    Abstract: Arranged in a series are an electrolyte tank capable of holding one of a number of substrates, each substrate having a conducting film thereon, and a cathode so that the cathode and substrate face each other in an electrolyte, an anodizing chamber for anodizing the substrate, a pretreatment chamber for calcining a photoresist mask put on part of the conducting film, and a post-treatment chamber for washing and drying the anodized substrate. A substrate transportation mechanism is provided for serially transporting the substrates one by one from the pretreatment chamber to the post-treatment chamber via the anodizing chamber. In the anodizing chamber described above, a formation voltage is increased to a value such that an oxide film with a desired thickness is formed so that the value of a current flowing through an aluminum alloy film as the conducting film is kept constant with the current density ranging from 3.0 mA/cm.sup.2 to 15.0 mA/cm.sup.2.
    Type: Grant
    Filed: August 8, 1996
    Date of Patent: March 31, 1998
    Assignee: Casio Computer Co., Ltd.
    Inventors: Kunihiro Matsuda, Hisatoshi Mori
  • Patent number: 5441618
    Abstract: Arranged in a series are an electrolyte tank capable of holding one of a number of substrates, each substrate having a conducting film thereon, and a cathode so that the cathode and substrate face each other in an electrolyte, an anodizing chamber for anodizing the substrate, a pretreatment chamber for calcining a photoresist mask put on part of the conducting film, and a post-treatment chamber for washing and drying the anodized substrate. A substrate transportation mechanism is provided for serially transporting the substrates one by one from the pretreatment chamber to the post-treatment chamber via the anodizing chamber. In the anodizing chamber described above, a formation voltage is increased to a value such that an oxide film with a desired thickness is formed so that the value of a current flowing through an aluminum alloy film as the conducting film is kept constant with the current density ranging from 3.0 mA/cm.sup.2 to 15.0 mA/cm.sup.2.
    Type: Grant
    Filed: November 2, 1993
    Date of Patent: August 15, 1995
    Assignee: Casio Computer Co., Ltd.
    Inventors: Kunihiro Matsuda, Hisatoshi Mori
  • Patent number: 5367179
    Abstract: A thin-film transistor comprises a gate electrode formed on an insulating substrate, a gate insulating film covering the gate electrode and the insulating substrate, an i-type semiconductor layer formed on the gate insulating film, and a source electrode and a drain electrode electrically connected to two ends of the i-type semiconductor layer, respectively. The gate electrode is made of aluminum alloy containing high-melting-point metal such as Ti and Ta and oxygen or nitrogen or both.
    Type: Grant
    Filed: November 12, 1992
    Date of Patent: November 22, 1994
    Assignee: Casio Computer Co., Ltd.
    Inventors: Hisatoshi Mori, Syunichi Sato, Naohiro Konya, Ichiro Ohno, Hiromitsu Ishii, Kunihiro Matsuda, Junji Shiota
  • Patent number: 5352907
    Abstract: A thin-film transistor includes a gate electrode and a semiconductor film consisting of amorphous silicon, formed on an insulating substrate to oppose each other through a gate insulating film, ohmic contact layers composed of n-type amorphous silicon doped with an impurity, electrically insulated from each other on the semiconductor film, and electrically connected to the semiconductor film, and source and drain electrodes arranged on the semiconductor film with a predetermined gap to form a channel portion, and electrically connected to the semiconductor film through the ohmic contact layers. The gate electrode and a portion surrounding the gate electrode are entirely formed into a continuous metal oxide film by a chemical reaction.
    Type: Grant
    Filed: March 24, 1992
    Date of Patent: October 4, 1994
    Assignee: Casio Computer Co., Ltd.
    Inventors: Kunihiro Matsuda, Hiromitsu Ishii, Naohiro Konya
  • Patent number: 5334859
    Abstract: A thin-film transistor panel comprises an insulative substrate, a plurality of thin-film transistor elements arranged at predetermined intervals on said substrate, and wirings electrically connecting the thin-film transistor elements characterized in that the thin-film transistor element comprises a gate electrode, a gate-insulating film, an i-type semiconductor layer to face the gate electrode through the gate insulating film therebetween, an n-type semiconductor layer, source and drain electrodes electrically connected the portions of the i-type semiconductor layer through the n-type semiconductor layer, and an anodically oxidized film located between the source and drain electrodes to electrically isolate, said source and drain electrodes.
    Type: Grant
    Filed: September 2, 1992
    Date of Patent: August 2, 1994
    Assignee: Casio Computer Co., Ltd.
    Inventor: Kunihiro Matsuda
  • Patent number: 5243202
    Abstract: A thin-film transistor comprises a gate electrode formed on a glass substrate, a gate insulating film formed essentially over an entire surface of the substrate to cover the gate electrode, a non-single-crystal silicon semiconductor film placed on the gate insulating film to cover the gate electrode; and a drain electrode and a source electrode spaced a specified distance apart on the semiconductor film and electrically connected to the semiconductor film so as to form the channel region of the transistor. The gate electrode is made of titanium-containing aluminum.
    Type: Grant
    Filed: January 12, 1993
    Date of Patent: September 7, 1993
    Assignee: Casio Computer Co., Ltd.
    Inventors: Hisatoshi Mori, Syunichi Sato, Naohiro Konya, Ichiro Ohno, Hiromitsu Ishii, Kunihiro Matsuda