Abstract: A data processor has a multiple length arithmetic circuit set with control data by a CPU that decodes and executes instructions through a bus, which performs processing for multiple length data based on the set control data. The multiple length arithmetic circuit performs a multiple length data operation by repeating processing where it makes read access to multiple length data at every unit of processing for multiple bits, partially operates read data, makes write access to the partially operated result, and delivers arithmetic information needed for the next partial operation to the next partial operation. The multiple length arithmetic circuit is a bus master module performing addressing operations by itself. It only operates by receiving control data setting from the CPU. The CPU does not need to repeatedly execute data transfer and add-subtract instructions. Multiple length data operations required for the Elliptic Curve Cryptosystem can be executed faster.