Patents by Inventor Kunihiro Nakano

Kunihiro Nakano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240096241
    Abstract: A display apparatus (100) includes a shelf tag attachment member (102) being fixed to a front end surface of a product shelf S, and a shelf tag (101) having a display surface (103). The shelf tag (101) is attached to the shelf tag attachment member (102) via a rotation axis A, and is rotatable in a predetermined direction in which the display surface (103) is turned upward. A lower end of the shelf tag (101) is located below a lower surface LS of the product shelf S and a lower end of the shelf tag attachment member (102) in a vertical direction.
    Type: Application
    Filed: November 5, 2021
    Publication date: March 21, 2024
    Applicants: NEC Corporation, NEC Platforms, Ltd.
    Inventors: Hiroki Sugegaya, Akihiko Onita, Shunsuke Tsuda, Benny Goh, Hiromitsu Nakano, Kunihiro Akaba, Kazuhiko Oda
  • Patent number: 11335818
    Abstract: A solar cell includes a semiconductor substrate, a first conductive layer, a second conductive layer, a first electrode, a second electrode, and an island-shaped conductive layer. The first conductive layer and the second conductive layer are disposed on one principal surface of the semiconductor substrate. The first electrode is disposed on the first conductive layer and the second electrode is disposed on the second conductive layer. The first electrode and the second electrode are electrically separated, and the island-shaped conductive layer is disposed between the first electrode and the second electrode.
    Type: Grant
    Filed: January 8, 2021
    Date of Patent: May 17, 2022
    Assignee: KANEKA CORPORATION
    Inventors: Katsunori Konishi, Kunihiro Nakano, Hayato Kawasaki, Kunta Yoshikawa
  • Publication number: 20220140162
    Abstract: A back-contact solar cell having a first conductivity-type semiconductor layer in a first region on a back side of a semiconductor substrate, and a second conductivity-type semiconductor layer in a second region and the first region on the back side. In the first region, an intrinsic semiconductor layer and the first and second conductivity-type semiconductor layers are stacked successively on the back side. In the second region, the intrinsic semiconductor layer and the second conductivity-type semiconductor layer are stacked on the back side. In a boundary region between the first and second regions, an insulating layer, and the first and second conductivity-type semiconductor layers, are stacked successively on the back side, with the intrinsic semiconductor layer disposed between the layers and the back side. The insulating layer is interposed between the first conductivity-type semiconductor layer in the first region and the second conductivity-type semiconductor layer in the second region.
    Type: Application
    Filed: January 13, 2022
    Publication date: May 5, 2022
    Applicant: KANEKA CORPORATION
    Inventors: Katsunori KONISHI, Kunihiro Nakano
  • Patent number: 11302829
    Abstract: A photovoltaic device according to the present disclosure includes: a first-conductivity-type semiconductor film provided on a back side of a semiconductor substrate; a second-conductivity-type semiconductor film in which at least a part thereof is provided in a position different, in plan view, from a position of the first-conductivity-type semiconductor film on the back side of the semiconductor substrate; a protective film, which is formed on a back side of the first-conductivity-type semiconductor film and a back side of the second-conductivity-type semiconductor film, and which includes a conductive portion and a non-conductive transformed portion; and an electrode film formed on a back side of the conductive portion. The transformed portion of the protective film is provided along a conduction path between a back surface of the first-conductivity-type semiconductor film and a back surface of the second-conductivity-type semiconductor film.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: April 12, 2022
    Assignee: KANEKA CORPORATION
    Inventors: Kunihiro Nakano, Kunta Yoshikawa, Takashi Kuchiyama
  • Patent number: 11211519
    Abstract: The method for manufacturing a solar cell includes: forming a first semiconductor layer of first conductivity type on a surface of a semiconductor substrate; forming a lift-off layer containing a silicon-based material on the first semiconductor layer; selectively removing the lift-off layer and first semiconductor layer; forming a second semiconductor layer of second conductivity type on a surface having the lift-off layer and first semiconductor layer; and removing the second semiconductor layer covering the lift-off layer by removing the lift-off layer using an etching solution.
    Type: Grant
    Filed: August 21, 2020
    Date of Patent: December 28, 2021
    Assignee: KANEKA CORPORATION
    Inventors: Ryota Mishima, Kunihiro Nakano, Katsunori Konishi, Daisuke Adachi, Takashi Kuchiyama, Kenji Yamamoto
  • Publication number: 20210288196
    Abstract: A solar cell includes a semiconductor substrate having a photoelectric conversion section, a first electrode, and a second electrode. The semiconductor substrate has a thickness of 70 ?m or more and 200 ?m or less. A chipping mark is present on an edge of at least one principal surface of the semiconductor substrate. The maximum length of the chipping mark along a side of the semiconductor substrate is 45 ?m or less. The semiconductor substrate does not have a scribe mark due to laser irradiation. The solar cell can suppress a reduction in the fill factor.
    Type: Application
    Filed: June 9, 2017
    Publication date: September 16, 2021
    Inventors: Kunihiro NAKANO, Kunta YOSHIKAWA, Kenji YAMAMOTO
  • Patent number: 11004995
    Abstract: A photovoltaic device according to the present disclosure is provided with: a condensing optical system having chromatic aberration; a first photoelectric converter, which is arranged on an optical axis of the condensing optical system; and a second photoelectric converter, which is arranged on an outer peripheral side of the first photoelectric converter when viewed from an optical axis direction of the condensing optical system, and which has a bandgap lower than a bandgap of the first photoelectric converter, wherein the first photoelectric converter is arranged on an inner side of a rectangle that circumscribes a condensing region of absorbable longest-wavelength light determined based on the bandgap.
    Type: Grant
    Filed: October 4, 2017
    Date of Patent: May 11, 2021
    Assignee: KANEKA CORPORATION
    Inventors: Kunihiro Nakano, Hisashi Uzu, Kenji Yamamoto
  • Publication number: 20210135027
    Abstract: A solar cell includes a semiconductor substrate, a first conductive layer, a second conductive layer, a first electrode, a second electrode, and an island-shaped conductive layer. The first conductive layer and the second conductive layer are disposed on one principal surface of the semiconductor substrate. The first electrode is disposed on the first conductive layer and the second electrode is disposed on the second conductive layer. The first electrode and the second electrode are electrically separated, and the island-shaped conductive layer is disposed between the first electrode and the second electrode.
    Type: Application
    Filed: January 8, 2021
    Publication date: May 6, 2021
    Applicant: KANEKA CORPORATION
    Inventors: Katsunori Konishi, Kunihiro Nakano, Hayato Kawasaki, Kunta Yoshikawa
  • Publication number: 20210111287
    Abstract: A photovoltaic device according to the present disclosure includes: a first-conductivity-type semiconductor film provided on a back side of a semiconductor substrate; a second-conductivity-type semiconductor film in which at least a part thereof is provided in a position different, in plan view, from a position of the first-conductivity-type semiconductor film on the back side of the semiconductor substrate; a protective film, which is formed on a back side of the first-conductivity-type semiconductor film and a back side of the second-conductivity-type semiconductor film, and which includes a conductive portion and a non-conductive transformed portion; and an electrode film formed on a back side of the conductive portion. The transformed portion of the protective film is provided along a conduction path between a back surface of the first-conductivity-type semiconductor film and a back surface of the second-conductivity-type semiconductor film.
    Type: Application
    Filed: December 22, 2017
    Publication date: April 15, 2021
    Inventors: Kunihiro NAKANO, Kunta YOSHIKAWA, Takashi KUCHIYAMA
  • Publication number: 20210103216
    Abstract: A resist composition for pattern printing contains a resin (A) component that contains a combination of at least two or more types of amino group-containing resins each containing an amino group of different amine numbers respectively, the entire resin (A) component having an amine number of 1.5 to 10.0, a compound (B) component that generates an amine by means of moisture and/or light, a thickener (C) component, and a diluent (D) component. The resist composition has high resistance to an alkaline etchant, can be easily peeled off by an aqueous acid solution, and enables a protective pattern to be formed by printing.
    Type: Application
    Filed: December 17, 2020
    Publication date: April 8, 2021
    Applicant: KANEKA CORPORATION
    Inventors: Hitoshi TAMAI, Yuji TAKAHASHI, Shimpei OKAMOTO, Kunihiro NAKANO
  • Publication number: 20210057597
    Abstract: A method for manufacturing a solar cell includes: forming a first semiconductor layer of a first conductivity type on and over one of two major surfaces facing each other on a crystal substrate; forming a lift-off layer on and over the first semiconductor layer; selectively removing the lift-off layer and first semiconductor layer; forming a second semiconductor layer of a second conductivity type on and over the major surface having the lift-off layer and the first semiconductor layer; and removing the second semiconductor layer covering the lift-off layer by removing the lift-off layer using an etching solution; and washing the crystal substrate by using a rinsing liquid.
    Type: Application
    Filed: November 5, 2020
    Publication date: February 25, 2021
    Applicant: KANEKA CORPORATION
    Inventors: Kunihiro NAKANO, Ryota MISHIMA, Katsunori KONISHI, Takashi KUCHIYAMA
  • Patent number: 10916667
    Abstract: A solar cell includes a semiconductor substrate, a first conductive layer, a second conductive layer, a first electrode, a second electrode, and an island-shaped conductive layer. The first conductive layer and the second conductive layer are disposed on one principal surface of the semiconductor substrate. The first electrode is disposed on the first conductive layer and the second electrode is disposed on the second conductive layer. The first electrode and the second electrode are electrically separated, and the island-shaped conductive layer is disposed between the first electrode and the second electrode.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: February 9, 2021
    Assignee: KANEKA CORPORATION
    Inventors: Katsunori Konishi, Kunihiro Nakano, Hayato Kawasaki, Kunta Yoshikawa
  • Publication number: 20200411713
    Abstract: The method for manufacturing a solar cell includes: forming a first semiconductor layer of first conductivity type on a surface of a semiconductor substrate; forming a lift-off layer containing a silicon-based material on the first semiconductor layer; selectively removing the lift-off layer and first semiconductor layer; forming a second semiconductor layer of second conductivity type on a surface having the lift-off layer and first semiconductor layer; and removing the second semiconductor layer covering the lift-off layer by removing the lift-off layer using an etching solution.
    Type: Application
    Filed: August 21, 2020
    Publication date: December 31, 2020
    Inventors: Ryota MISHIMA, Kunihiro NAKANO, Katsunori KONISHI, Daisuke ADACHI, Takashi KUCHIYAMA, Kenji YAMAMOTO
  • Patent number: 10854767
    Abstract: The solar cell includes an n-type semiconductor layer and a p-type semiconductor layer on a first principal surface of a crystalline silicon substrate. The n-type semiconductor layer is provided so as to extend over a part on a p-type semiconductor layer-formed region provided with the p-type semiconductor layer, and a p-type semiconductor layer non-formed-region where the p-type semiconductor layer is not provided. In a region where the n-type semiconductor layer is provided on the p-type semiconductor layer, a protecting layer is between the p-type semiconductor layer and the n-type semiconductor layer. The protecting layer includes: an underlying protecting layer that is in contact with the p-type semiconductor layer; and an insulating layer that is on the underlying protecting layer. The underlying protecting layer includes an intrinsic silicon-based layer or an n-type silicon-based layer.
    Type: Grant
    Filed: March 7, 2016
    Date of Patent: December 1, 2020
    Assignee: KANEKA CORPORATION
    Inventors: Hayato Kawasaki, Kunta Yoshikawa, Kunihiro Nakano, Katsunori Konishi, Kenji Yamamoto
  • Patent number: 10727360
    Abstract: A method for manufacturing a photoelectric conversion device, wherein the photoelectric conversion device includes a semiconductor substrate having a first conductivity-type region, a second conductivity-type region, and a boundary region on a first principal surface of a semiconductor substrate, the boundary region being in contact with and separating the first conductivity-type region and the second conductivity-type region, the method including: stacking a second conductivity-type semiconductor layer over the second conductivity-type region and the boundary region on the first principal surface of the semiconductor substrate; stacking an insulating layer over the second conductivity-type semiconductor layer in the boundary region; stacking a first conductivity-type semiconductor layer over the first conductivity-type region on the first principal surface of the semiconductor substrate and on the insulating layer; stacking an electrode layer on the first conductivity-type semiconductor layer and the second
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: July 28, 2020
    Assignee: KANEKA CORPORATION
    Inventors: Katsunori Konishi, Kunta Yoshikawa, Hayato Kawasaki, Kunihiro Nakano
  • Patent number: 10644178
    Abstract: A solar cell includes: first conductivity-type layers and second conductivity-type layers each provided on a rear surface of a semiconductor substrate; first electrodes provided on the first conductivity-type layers; and second electrodes provided on the second conductivity-type layers. The first electrodes and the second electrodes are spaced apart from each other, and the first electrodes include a plurality of regions isolated from one another by the second electrodes disposed therebetween. Each of the plurality of regions of the first electrodes includes a non-mounting electrode section and a wiring-mounting electrode section having a larger electrode height than the non-connection electrode section. In two adjacent first electrode regions, an imaginary line connecting the top of the wiring-mounting electrode section of one of the regions and the top of the wiring-mounting electrode section of the other region does not cross the second electrode disposed between the two regions.
    Type: Grant
    Filed: September 20, 2017
    Date of Patent: May 5, 2020
    Assignee: KANEKA CORPORATION
    Inventors: Kunta Yoshikawa, Kunihiro Nakano, Hayato Kawasaki, Katsunori Konishi
  • Patent number: 10593820
    Abstract: In the solar cell module, a first solar cell and a second solar cell are stacked together with an electroconductive member interposed therebetween, such that a cleaved surface-side periphery on a light-receiving surface of the first solar cell overlaps a periphery on a back surface of the second solar cell. The first solar cell and the second solar cell each have: photoelectric conversion section including a crystalline silicon substrate; collecting electrode; and back electrode. At a section where the first solar cell and the second solar cell are stacked, the collecting electrode of the first solar cell and the back electrode of the second solar cell are electrically connected to each other by coming into contact with the electroconductive member. An insulating member is provided on a part of the cleaved surface-side periphery on the light-receiving surface of the first solar cell, where the collecting electrode is not provided.
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: March 17, 2020
    Assignee: KANEKA CORPORATION
    Inventors: Kunihiro Nakano, Kunta Yoshikawa, Toru Terashita, Masafumi Hiraishi, Kenji Yamamoto
  • Publication number: 20190393370
    Abstract: A method for manufacturing a photoelectric conversion device, wherein the photoelectric conversion device includes a semiconductor substrate having a first conductivity-type region, a second conductivity-type region, and a boundary region on a first principal surface of a semiconductor substrate, the boundary region being in contact with and separating the first conductivity-type region and the second conductivity-type region, the method including: stacking a second conductivity-type semiconductor layer over the second conductivity-type region and the boundary region on the first principal surface of the semiconductor substrate; stacking an insulating layer over the second conductivity-type semiconductor layer in the boundary region; stacking a first conductivity-type semiconductor layer over the first conductivity-type region on the first principal surface of the semiconductor substrate and on the insulating layer; stacking an electrode layer on the first conductivity-type semiconductor layer and the second
    Type: Application
    Filed: September 4, 2019
    Publication date: December 26, 2019
    Applicant: KANEKA CORPORATION
    Inventors: Katsunori Konishi, Kunta Yoshikawa, Hayato Kawasaki, Kunihiro Nakano
  • Publication number: 20190319149
    Abstract: A photovoltaic device according to the present disclosure is provided with: a condensing optical system having chromatic aberration; a first photoelectric converter, which is arranged on an optical axis of the condensing optical system; and a second photoelectric converter, which is arranged on an outer peripheral side of the first photoelectric converter when viewed from an optical axis direction of the condensing optical system, and which has a bandgap lower than a bandgap of the first photoelectric converter, wherein the first photoelectric converter is arranged on an inner side of a rectangle that circumscribes a condensing region of absorbable longest-wavelength light determined based on the bandgap.
    Type: Application
    Filed: October 4, 2017
    Publication date: October 17, 2019
    Applicant: KANEKA CORPORATION
    Inventors: Kunihiro Nakano, Hisashi Uzu, Kenji Yamamoto
  • Patent number: 10446698
    Abstract: A photoelectric conversion device includes, on one principal surface of a semiconductor substrate, a first conductivity-type region, a second conductivity-type region, and a boundary region which is in contact with each of the first conductivity-type region and the second conductivity-type region to separate these two regions. A first conductivity-type semiconductor layer is disposed over the entire first conductivity-type region and extending over the boundary region. A second conductivity-type semiconductor layer is disposed over the entire second conductivity-type region and extending over the boundary region. An insulating layer is disposed over the entire boundary region. A first electrode is disposed over the entire first conductivity-type region and extending over the boundary region, and a second electrode is disposed over the second conductivity-type region.
    Type: Grant
    Filed: June 7, 2018
    Date of Patent: October 15, 2019
    Assignee: KANEKA CORPORATION
    Inventors: Katsunori Konishi, Kunta Yoshikawa, Hayato Kawasaki, Kunihiro Nakano