Patents by Inventor Kunihiro Takeda

Kunihiro Takeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10380117
    Abstract: An event-occurrence-place estimation method having a process executed by a computer, the process includes acquiring a message of a predetermined event from social media to which a message is posted; extracting occurrence place information indicating an occurrence place of the predetermined event from the acquired messages; ranking the occurrence places in descending order according to the number of acquired messages corresponding to each of the pieces of occurrence place information, cumulating, for each of the occurrence places, the number of acquired messages of the occurrence place and the number of acquired messages of the occurrence places which are ranked higher than the occurrence place information, and identifying a change point where an increase rate of the cumulated number of the messages is an average increase ratio; and outputting the piece of occurrence place information identified by the identified change point.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: August 13, 2019
    Assignee: FUJITSU LIMITED
    Inventor: Kunihiro Takeda
  • Publication number: 20150302019
    Abstract: An event-occurrence-place estimation method having a process executed by a computer, the process includes acquiring a message of a predetermined event from social media to which a message is posted; extracting occurrence place information indicating an occurrence place of the predetermined event from the acquired messages; ranking the occurrence places in descending order according to the number of acquired messages corresponding to each of the pieces of occurrence place information, cumulating, for each of the occurrence places, the number of acquired messages of the occurrence place and the number of acquired messages of the occurrence places which are ranked higher than the occurrence place information, and identifying a change point where an increase rate of the cumulated number of the messages is an average increase ratio; and outputting the piece of occurrence place information identified by the identified change point.
    Type: Application
    Filed: March 10, 2015
    Publication date: October 22, 2015
    Applicant: FUJITSU LIMITED
    Inventor: Kunihiro TAKEDA
  • Patent number: 8405209
    Abstract: Provided are a semiconductor device capable of reducing stress due to a density difference in the arrangement of bumps, and a method of manufacturing the semiconductor device. The semiconductor device includes: a wiring board including an electrode terminal group; a semiconductor chip including a bump formation surface where a bump group is formed and being mounted on the wiring board by using the bump group. The bump formation surface includes a first region where an area density of a region having bumps arranged therein is a first density, a second region where an area density of a region having bumps arranged therein is a second density lower than the first density, and a third region provided in a border portion between the first and second regions. In the third region, an area density of a region having bumps arranged therein is above the second density and below the first density.
    Type: Grant
    Filed: October 14, 2009
    Date of Patent: March 26, 2013
    Assignee: Renesas Electronics Corporation
    Inventor: Kunihiro Takeda
  • Publication number: 20100123244
    Abstract: Provided are a semiconductor device capable of reducing stress due to a density difference in the arrangement of bumps, and a method of manufacturing the semiconductor device. The semiconductor device includes: a wiring board including an electrode terminal group; a semiconductor chip including a bump formation surface where a bump group is formed and being mounted on the wiring board by using the bump group. The bump formation surface includes a first region where an area density of a region having bumps arranged therein is a first density, a second region where an area density of a region having bumps arranged therein is a second density lower than the first density, and a third region provided in a border portion between the first and second regions. In the third region, an area density of a region having bumps arranged therein is above the second density and below the first density.
    Type: Application
    Filed: October 14, 2009
    Publication date: May 20, 2010
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Kunihiro Takeda
  • Patent number: 6549868
    Abstract: A magnetic field is applied to a defective semiconductor device to be tested. A current is applied from a power supply to a wiring of the semiconductor device. At this time, a stress occurs to the wiring of the semiconductor device. A stress detector detects the stress and creates a first stress image. Next, a same magnetic field and a same current are applied to a good semiconductor device same in type and a stress is detected. By doing so, a second stress image as a comparison stress image is created. Next, a difference image between the first and second stress images is created by an image processor. As a result, only a stress resulting from a leak current is extracted. Next, the difference image is compared with a wiring pattern image of the semiconductor device to thereby specify a leakage portion.
    Type: Grant
    Filed: April 26, 2001
    Date of Patent: April 15, 2003
    Assignee: NEC Corporation
    Inventor: Kunihiro Takeda
  • Publication number: 20020178129
    Abstract: A lease-business support apparatus collects latest information from a brand-new-sales-company terminal, a secondhand-sales-company terminal, a leasing-company terminal, and a maintenance-company terminal which are related to lease business. By performing quality management and appropriate fixed-period-sales-price calculation based on the latest information, the lease-business support apparatus provides each customer terminal with appropriate lease-business information. This makes it possible to inexpensively lease a high-quality item.
    Type: Application
    Filed: January 29, 2002
    Publication date: November 28, 2002
    Inventors: Katsunori Horimoto, Kunihiro Takeda, Hitomi Nemoto, Mitsuyoshi Uchida, Osamu Kawabata, Toru Endo, Yoshihisa Tsuji, Shuji Shimada, Masayuki Enari, Hironori Kato, Yoko Toyoda, Hisahito Gondo, Hisayoshi Nakagome, Aritomo Sakamoto, Hideyasu Kokubo, Toshiaki Nagai, Kiyotaka Iwamoto, Kazuo Hotta, Yutaka Okazaki, Hisao Myoga
  • Publication number: 20010039485
    Abstract: A magnetic field is applied to a defective semiconductor device to be tested. A current is applied from a power supply to a wiring of the semiconductor device. At this time, a stress occurs to the wiring of the semiconductor device. A stress detector detects the stress and creates a first stress image. Next, a same magnetic field and a same current are applied to a good semiconductor device same in type and a stress is detected. By doing so, a second stress image as a comparison stress image is created. Next, a difference image between the first and second stress images is created by an image processor. As a result, only a stress resulting from a leak current is extracted. Next, the difference image is compared with a wiring pattern image of the semiconductor device to thereby specify a leakage portion.
    Type: Application
    Filed: April 26, 2001
    Publication date: November 8, 2001
    Inventor: Kunihiro Takeda
  • Patent number: 5473259
    Abstract: In an IC tester configured to simultaneously test a plurality of test ICs, each of the test ICs includes a temperature sensor part for detecting the temperature of the test IC itself. A controller receives a temperature detection signal from each test IC and controls a plurality of pulse generators each provided for supplying a pulse signal to a corresponding one of the test ICs. Each pulse generator is controlled by the controller to change the frequency of the pulse signal so as to maintain the temperature of the corresponding test IC at a target temperature in common to all the test ICs to permit simultaneous testing in the IC tester.
    Type: Grant
    Filed: December 29, 1994
    Date of Patent: December 5, 1995
    Assignee: NEC Corporation
    Inventor: Kunihiro Takeda