Patents by Inventor Kunihito Kato
Kunihito Kato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9589824Abstract: A method for manufacturing a semiconductor device is provided. The method includes a process of applying liquid to one surface of a support substrate; a process of warping the support substrate by a volume change due to a phase transition of the liquid by solidifying the liquid; a process of attaching a semiconductor substrate having a linear expansion coefficient different from that of the support substrate to the support substrate in a heated state; and a process of warping the support substrate due to a linear expansion coefficient difference between the semiconductor substrate and the support substrate by cooling the support substrate to which the semiconductor substrate is attached. A warping direction due to the phase transition is opposite to a warping direction due to the linear expansion coefficient difference.Type: GrantFiled: January 28, 2016Date of Patent: March 7, 2017Assignee: Toyota Jidosha Kabushiki KaishaInventor: Kunihito Kato
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Patent number: 9490127Abstract: A method includes: forming a front surface structure of a semiconductor element on a front surface side of a semiconductor substrate; forming crystal defects in the semiconductor substrate by implanting charged particles into the semiconductor substrate; subjecting the semiconductor substrate to a heat treatment after having formed the crystal defects; attaching a supporting plate on the front surface side of the semiconductor substrate after the heat treatment; thinning the semiconductor substrate by grinding a back surface side of the semiconductor substrate to which the supporting plate has been attached; and forming a back surface structure of the semiconductor element on a back surface of the thinned semiconductor substrate.Type: GrantFiled: January 19, 2015Date of Patent: November 8, 2016Assignee: Toyota Jidosha Kabushiki KaishaInventors: Kunihito Kato, Shuhei Oki, Takahiro Ito
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Publication number: 20160233123Abstract: A method for manufacturing a semiconductor device is provided. The method includes a process of applying liquid to one surface of a support substrate; a process of warping the support substrate by a volume change due to a phase transition of the liquid by solidifying the liquid; a process of attaching a semiconductor substrate having a linear expansion coefficient different from that of the support substrate to the support substrate in a heated state; and a process of warping the support substrate due to a linear expansion coefficient difference between the semiconductor substrate and the support substrate by cooling the support substrate to which the semiconductor substrate is attached. A warping direction due to the phase transition is opposite to a warping direction due to the linear expansion coefficient difference.Type: ApplicationFiled: January 28, 2016Publication date: August 11, 2016Inventor: Kunihito Kato
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Publication number: 20160233176Abstract: A method for manufacturing a semiconductor device includes attaching a semiconductor substrate to a support substrate in a heated state, and processing the semiconductor substrate attached to the support substrate. The support substrate has a linear coefficient different from that of the semiconductor substrate. In an overlap region in which the support substrate overlaps the semiconductor substrate attached to the support substrate, a plurality of through-holes penetrating the support substrate from a front surface to a rear surface is provided. A straight line drawn on the front surface of the support substrate in any direction intersects with at least one of the through holes as long as the straight line is drawn through a center of the overlap region.Type: ApplicationFiled: January 28, 2016Publication date: August 11, 2016Applicants: Toyota Jidosha Kabushiki Kaisha, Toyota Jidosha Kabushiki KaishaInventor: Kunihito Kato
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Patent number: 9214522Abstract: A semiconductor wafer, includes: a plurality of element regions; a surface electrode that is disposed in each of the plurality of element regions; an insulating layer that is disposed in each of the plurality of element regions and of which height from a front side surface of the semiconductor wafer is higher than that of the surface electrode in a periphery of the surface electrode; and a dicing line groove that is formed in a front side surface of the semiconductor wafer, that surrounds the surface electrode with the insulating layer therebetween, of which height from the front side surface of the semiconductor wafer is lower than that of the insulating layer, and that extends to a perimeter of the semiconductor wafer; in which the insulating layer is formed with a communication passage that extends from a side of the surface electrode to the dicing line groove.Type: GrantFiled: December 19, 2013Date of Patent: December 15, 2015Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Kunihito Kato, Toru Onishi
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Publication number: 20150206758Abstract: A method includes: forming a front surface structure of a semiconductor element on a front surface side of a semiconductor substrate; forming crystal defects in the semiconductor substrate by implanting charged particles into the semiconductor substrate; subjecting the semiconductor substrate to a heat treatment after having formed the crystal defects; attaching a supporting plate on the front surface side of the semiconductor substrate after the heat treatment; thinning the semiconductor substrate by grinding a back surface side of the semiconductor substrate to which the supporting plate has been attached; and forming a back surface structure of the semiconductor element on a back surface of the thinned semiconductor substrate.Type: ApplicationFiled: January 19, 2015Publication date: July 23, 2015Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Kunihito Kato, Shuhei Oki, Takahiro Ito
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Publication number: 20140203411Abstract: A semiconductor wafer, includes: a plurality of element regions; a surface electrode that is disposed in each of the plurality of element regions; an insulating layer that is disposed in each of the plurality of element regions and of which height from a front side surface of the semiconductor wafer is higher than that of the surface electrode in a periphery of the surface electrode; and a dicing line groove that is formed in a front side surface of the semiconductor wafer, that surrounds the surface electrode with the insulating layer therebetween, of which height from the front side surface of the semiconductor wafer is lower than that of the insulating layer, and that extends to a perimeter of the semiconductor wafer; in which the insulating layer is formed with a communication passage that extends from a side of the surface electrode to the dicing line groove.Type: ApplicationFiled: December 19, 2013Publication date: July 24, 2014Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Kunihito KATO, Toru ONISHI
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Patent number: 7286688Abstract: A mobile unit moves on a reference plane. The mobile unit has an object detection apparatus for detecting an object on the reference plane. The object detection apparatus includes a camera, a mirror, and a computer. The mirror cuts an image received by the camera such that the camera receives an image that is divided into a reference plane image and an object image. The reference plane image contains the reference plane. The object image contains the object and does not contain the reference plane. Therefore, the distance measuring apparatus can easily separate the region including the object and the region including no object, and accurately detect the distance to the object.Type: GrantFiled: February 27, 2004Date of Patent: October 23, 2007Assignee: Gifu UniversityInventors: Kazuhiko Yamamoto, Kunihito Kato, Ayami Iwata
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Publication number: 20050111697Abstract: A mobile unit moves on a reference plane. The mobile unit has an object detection apparatus for detecting an object on the reference plane. The object detection apparatus includes a camera, a mirror, and a computer. The mirror cuts an image received by the camera such that the camera receives an image that is divided into a reference plane image and an object image. The reference plane image contains the reference plane. The object image contains the object and does not contain the reference plane. Therefore, the distance measuring apparatus can easily separate the region including the object and the region including no object, and accurately detect the distance to the object.Type: ApplicationFiled: February 27, 2004Publication date: May 26, 2005Inventors: Kazuhiko Yamamoto, Kunihito Kato, Ayami Iwata