Patents by Inventor Kunio Sakuma

Kunio Sakuma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4786545
    Abstract: A circuit substrate for use in manufacturing integrated circuit devices by the strip-support method in connection with a semiconductor element having conductive pads. The circuit substrate includes a base layer, a conductive circuit layer supported on the base layer for mechanically and electrically coupling to the conductive pads of a semiconductor device. The conductive circuit layer includes a plurality of finger leads with a bump at the end of each finger lead for mechanically and electrically coupling to one of the conductive pads. The coupling surface of each bump has a roughness in a range between 5 and 20 microns. The inherent roughness of the bumps can be augmented by plating the bumps with nickel and gold. A method for forming bumps on the conductive layer of a circuit substrate for attachment of the circuit substrate to conductive pads of a semiconductor element is also provided. The method includes coating a front and a back surface of the conductive layer with photo-resists.
    Type: Grant
    Filed: February 24, 1987
    Date of Patent: November 22, 1988
    Assignee: Seiko Epson Corporation
    Inventors: Kunio Sakuma, Sadasumi Uchiyama
  • Patent number: 4644445
    Abstract: This invention describes an improved resin mounting structure for use with an integrated circuit. An integrated circuit chip is affixed to a circuit substrate which has a hole. Circuit patterns connect to the contact pads of the integrated circuit chip and are added along the circuit substrate. An epoxy resin material is gated through the hole to surround and enclose the integrated circuit chip. In this invention, circuit patterns which are added beneath the integrated circuit chip are positioned over the hole in the substrate to allow an unimpeded flow of resin material. In addition, conductive spacing pegs are provided at each integrated circuit contact pad to allow for a uniform spacing between the integrated circuit and the circuit substrate and to provide for a more electrically and mechanically secure connection between the IC chip and the circuit substrate. Also, the circuit substrate is formed from a flexible material to absorb the displacement caused by differential thermal expansion.
    Type: Grant
    Filed: July 31, 1986
    Date of Patent: February 17, 1987
    Assignee: Seiko Epson Kabushiki Kaisha
    Inventor: Kunio Sakuma