Patents by Inventor Kunio Shigemura

Kunio Shigemura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8557633
    Abstract: A technique that makes it possible to enhance the reliability of a module using PCB as its module substrate is provided. Solder connection of a single-chip component 43, an integrated chip component 44, and a semiconductor chip IC2 by Pb-free solder is carried out by heat treatment at a temperature below 280° C. using a heat block. Solder connection of a semiconductor chip IC1 by high-melting point solder is carried out by heat treatment at a temperature of 280° C. or higher using a hot jet. Thus, the semiconductor chip IC1 can be solder connected to PCB 38 using high-melting point solder without the following troubles: damage to the PCB 38 due to heat, for example, burning of solder resist; and peeling of prepreg from a core material. Therefore, the semiconductor chip IC1 can be mounted over the PCB 38 with high connection strength.
    Type: Grant
    Filed: April 5, 2011
    Date of Patent: October 15, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Kunio Shigemura, Kenji Hanada, Masaki Nakanishi, Takafumi Nishita, Masayoshi Shinoda, Seiichi Tomoi
  • Publication number: 20110183474
    Abstract: A technique that makes it possible to enhance the reliability of a module using PCB as its module substrate is provided. Solder connection of a single-chip component 43, an integrated chip component 44, and a semiconductor chip IC2 by Pb-free solder is carried out by heat treatment at a temperature below 280° C. using a heat block. Solder connection of a semiconductor chip IC1 by high-melting point solder is carried out by heat treatment at a temperature of 280° C. or higher using a hot jet. Thus, the semiconductor chip IC1 can be solder connected to PCB 38 using high-melting point solder without the following troubles: damage to the PCB 38 due to heat, for example, burning of solder resist; and peeling of prepreg from a core material. Therefore, the semiconductor chip IC1 can be mounted over the PCB 38 with high connection strength.
    Type: Application
    Filed: April 5, 2011
    Publication date: July 28, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Kunio Shigemura, Kenji Hanada, Masaki Nakanishi, Takafumi Nishita, Masayoshi Shinoda, Seiichi Tomoi
  • Publication number: 20080253100
    Abstract: A technique that makes it possible to enhance the reliability of a module using PCB as its module substrate is provided. Solder connection of a single-chip component 43, an integrated chip component 44, and a semiconductor chip IC2 by Pb-free solder is carried out by heat treatment at a temperature below 280° C. using a heat block. Solder connection of a semiconductor chip IC1 by high-melting point solder is carried out by heat treatment at a temperature of 280° C. or higher using a hot jet. Thus, the semiconductor chip IC1 can be solder connected to PCB 38 using high-melting point solder without the following troubles: damage to the PCB 38 due to heat, for example, burning of solder resist; and peeling of prepreg from a core material. Therefore, the semiconductor chip IC1 can be mounted over the PCB 38 with high connection strength.
    Type: Application
    Filed: June 12, 2008
    Publication date: October 16, 2008
    Inventors: Kunio Shigemura, Kenji Hanada, Masaki Nakanishi, Takafumi Nishita, Masayoshi Shinoda, Seiichi Tomoi
  • Patent number: 7396701
    Abstract: A technique that makes it possible to enhance the reliability of a module using PCB as its module substrate is provided. Solder connection of a single-chip component 43, an integrated chip component 44, and a semiconductor chip IC2 by Pb-free solder is carried out by heat treatment at a temperature below 280° C. using a heat block. Solder connection of a semiconductor chip IC1 by high-melting point solder is carried out by heat treatment at a temperature of 280° C. or higher using a hot jet. Thus, the semiconductor chip IC1 can be solder connected to PCB 38 using high-melting point solder without the following troubles: damage to the PCB 38 due to heat, for example, burning of solder resist; and peeling of prepreg from a core material. Therefore, the semiconductor chip IC1 can be mounted over the PCB 38 with high connection strength.
    Type: Grant
    Filed: November 18, 2005
    Date of Patent: July 8, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Kunio Shigemura, Kenji Hanada, Masaki Nakanishi, Takafumi Nishita, Masayoshi Shinoda, Seiichi Tomoi
  • Publication number: 20060110859
    Abstract: A technique that makes it possible to enhance the reliability of a module using PCB as its module substrate is provided. Solder connection of a single-chip component 43, an integrated chip component 44, and a semiconductor chip IC2 by Pb-free solder is carried out by heat treatment at a temperature below 280° C. using a heat block. Solder connection of a semiconductor chip IC1 by high-melting point solder is carried out by heat treatment at a temperature of 280° C. or higher using a hot jet. Thus, the semiconductor chip IC1 can be solder connected to PCB 38 using high-melting point solder without the following troubles: damage to the PCB 38 due to heat, for example, burning of solder resist; and peeling of prepreg from a core material. Therefore, the semiconductor chip IC1 can be mounted over the PCB 38 with high connection strength.
    Type: Application
    Filed: November 18, 2005
    Publication date: May 25, 2006
    Inventors: Kunio Shigemura, Kenji Hanada, Masaki Nakanishi, Takafumi Nishita, Masayoshi Shinoda, Seiichi Tomoi
  • Publication number: 20050116138
    Abstract: The reliability and production yield of a solid state image sensing device is improved. Over a surface of a wiring substrate, a sensor chip and a lens-barrel having the sensor chip housed therein are mounted. To the lens-barrel, a lens holder for retaining a lens is connected. Over a back surface of the wiring substrate, a logic chip, a memory chip and a passive part are mounted, and they are sealed with a sealing resin. The lens-barrel and lens holder are each threaded. They are thermally welded while the threads are fitted to each other. The passive part is bonded to the wiring substrate via a Sn—Ag type Pb-free solder. After the wiring substrate is subjected to plasma washing treatment, the sensor chip is mounted over the wiring substrate and an electrode pad of the sensor chip and an electrode of the wiring substrate are electrically connected via a bonding wire.
    Type: Application
    Filed: September 22, 2004
    Publication date: June 2, 2005
    Inventors: Kenji Hanada, Masaki Nakanishi, Kunio Shigemura, Takaomi Nishi, Koji Shida, Izumi Tezuka, Shunichi Abe, Yoshihiro Tomita, Mitsuaki Seino, Tohru Komatsu