Patents by Inventor Kunio Takayama
Kunio Takayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7911419Abstract: In a conventional method of driving a plasma display panel, for example, an auxiliary discharge is executed between an A electrode and a Y electrode to improve light-emission efficiency of a display discharge. However, since a phosphor layer is present between the A electrode and the Y electrode, the phosphor layer is exposed to a discharge, whereby there is a problem that its characteristic deteriorates. A method of driving a plasma display panel having a structure, in which at least three display electrodes X, Y, and Z used for a display discharge are provided to a display cell and no phosphor layer is formed between said display electrodes and a discharge space, the method comprising the steps of: varying a potential of at least one display electrode Z of said display electrodes during said display discharge; and making a potential of said at least one display electrode Z at a time of starting said display discharge different from that at a time of ending said display discharge.Type: GrantFiled: December 27, 2005Date of Patent: March 22, 2011Assignee: Fujitsu Hitachi Plasma Display LimitedInventors: Yasunobu Hashimoto, Tomokatsu Kishi, Tetsuya Sakamoto, Naoki Itokawa, Takayuki Kobayashi, Yoshimi Kawanami, Osamu Toyoda, Yasuhiko Kunii, Takahiro Takamori, Kunio Takayama
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Publication number: 20100328296Abstract: A plasma display device that inexpensively improves uniformity of luminance in a vertical direction of a PDP. The plasma display device includes: a plasma display panel (PDP) having an X electrode and Y electrode that are disposed parallel to each other while intersecting an address electrode at a discharge cell; a Y-board assembly that controls the Y electrode of the PDP; a Y-buffer-board assembly including a scan integrated circuit (IC) connected to the Y-board assembly to apply a scan voltage waveform and a sustain voltage waveform to the Y electrode; and a current supply element included in the Y-buffer-board assembly to supply a ground voltage to the Y-board assembly and to prevent overshooting of the sustain voltage waveform.Type: ApplicationFiled: April 30, 2010Publication date: December 30, 2010Applicant: Samsung SDI Co., Ltd.Inventor: Kunio TAKAYAMA
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Publication number: 20090219227Abstract: A plasma display device that prevents a luminance difference between scan lines by preventing an output voltage fluctuation in output lines connected to a scan IC. The plasma display device includes a plasma display panel having sustain electrodes, scan electrodes, and address electrodes, which are arranged to correspond to discharge cells to selectively drive the discharge cells, a chassis base supporting the plasma display panel, at least one printed circuit board mounted on the chassis base, and at least one flexible printed circuit connecting the scan electrodes to the printed circuit board. The flexible printed circuit includes input lines connecting at least one scan integrated circuit to the printed circuit board, output lines connecting the at least one integrated circuit to the scan electrodes, and ground lines that are formed beside outer sides of outermost output lines among the output lines to ground the at least one scan integrated circuit.Type: ApplicationFiled: February 13, 2009Publication date: September 3, 2009Inventor: Kunio Takayama
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Publication number: 20090122037Abstract: There is provided a method of driving a plasma display panel (PDP) capable of reducing an address period. The method of driving a PDP includes supplying scan signals to scan lines and supplying data signals to address electrodes. Each of the scan lines includes a scan pulse, and each of the data signals includes a data pulse. Each of the data signals is synchronized with one of the scan signals. The data pulse of the each of the data signals precedes the scan pulse of the synchronized scan signal.Type: ApplicationFiled: October 10, 2008Publication date: May 14, 2009Inventor: Kunio Takayama
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Publication number: 20090115699Abstract: A method for driving a plasma display including a scan electrode and an address electrode crossing the scan electrode, the method including applying a scan pulse to the scan electrode and applying an address pulse to the address electrode when the scan pulse is applied to the address pulse. The address pulse has a first voltage and a second voltage. The scan pulse has a third voltage and a fourth voltage. A largest difference between voltages of the address pulse and the scan pulse is a difference between the first voltage and the fourth voltage. A point of time at which the scan pulse reaches the fourth voltage is equal to or later than a point of time at which the address pulse reaches the first voltage.Type: ApplicationFiled: November 5, 2008Publication date: May 7, 2009Inventor: Kunio Takayama
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Publication number: 20080136745Abstract: A plasma display including a PDP and a driving method. High PDP temperatures and high load ratios impair the sustain discharge operation by creating uncontrollable charges that create a weak discharge during the address period. Subfields are rearranged to place a subfield having a weight lower than a reference weight between subfields having weights greater than the reference weight when the temperature of the PDP exceeds a reference temperature. The load ratio of at least one subfield is detected from an input video signal of one frame, and the subfields are rearranged when either the detected temperature is greater than the reference temperature or the detected load ratio is greater than a reference load ratio, or both. Uncontrollable charges are hence maintained below a threshold level and the weak discharge is reduced.Type: ApplicationFiled: October 30, 2007Publication date: June 12, 2008Inventor: Kunio Takayama
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Publication number: 20070200501Abstract: A Plasma Display Panel (PDP) has a reduced power consumption by forming transparent electrodes of the PDP so that the brightness of the PDP can be gradually reduced from a central region towards outer regions of the PDP.Type: ApplicationFiled: February 23, 2007Publication date: August 30, 2007Inventor: Kunio Takayama
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Publication number: 20070103079Abstract: A plasma display panel capable of reducing power consumption by lowering address discharge voltage and electrostatic capacitance among electrodes. The plasma display panel includes a front and a rear substrate facing each other; barrier ribs which are located on the rear substrate to define discharge cells; phosphor layers formed on the inner sides of the discharge cells; an intermediate substrate located over the barrier ribs; spacers located between the front and intermediate substrates; address electrodes which are formed on the intermediate substrate and sustain and scan electrodes which are formed on the front substrate along a direction crossing the direction of the address electrodes. A space between the front and intermediate substrates is under vacuum or filled with a fluid having a low permittivity in order to keep the address discharge voltage between the electrodes low.Type: ApplicationFiled: November 6, 2006Publication date: May 10, 2007Inventor: Kunio Takayama
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Patent number: 7123218Abstract: A method for driving a plasma display panel is provided in which a time necessary for an addressing process is shortened without using any special driving component. The method comprises an addressing process that includes the steps of setting light emission operation of the cells of a display of one screen, starting j-th row selection at a point during (j-1)th row selection, and changing the data electrodes from a control state corresponding to display data of the (j-1)th row to a control state corresponding to display data of the j-th row during a period in which the (j-1)th row selection and the j-th row selection are overlapped with each other.Type: GrantFiled: June 12, 2003Date of Patent: October 17, 2006Assignee: Hitachi, Ltd.Inventors: Kunio Takayama, Kenji Awamoto, Yasunobu Hashimoto
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Publication number: 20060158390Abstract: In a conventional method of driving a plasma display panel, for example, an auxiliary discharge is executed between an A electrode and a Y electrode to improve light-emission efficiency of a display discharge. However, since a phosphor layer is present between the A electrode and the Y electrode, the phosphor layer is exposed to a discharge, whereby there is a problem that its characteristic deteriorates. A method of driving a plasma display panel having a structure, in which at least three display electrodes X, Y, and Z used for a display discharge are provided to a display cell and no phosphor layer is formed between said display electrodes and a discharge space, the method comprising the steps of: varying a potential of at least one display electrode Z of said display electrodes during said display discharge; and making a potential of said at least one display electrode Z at a time of starting said display discharge different from that at a time of ending said display discharge.Type: ApplicationFiled: December 27, 2005Publication date: July 20, 2006Inventors: Yasunobu Hashimoto, Tomokatsu Kishi, Tetsuya Sakamoto, Naoki Itokawa, Takayuki Kobayashi, Yoshimi Kawanami, Osamu Toyoda, Yasuhiko Kunii, Takahiro Takamori, Kunio Takayama
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Patent number: 7050075Abstract: A data conversion circuit is provided for displaying a high definition image whose resolution is different from that of a display screen having a cell arrangement that is not a square arrangement. The data conversion circuit performs addition operation with weighting that is also resolution conversion of the integer ratio M:N and data correction for improving a linear display quality for input image data.Type: GrantFiled: January 21, 2003Date of Patent: May 23, 2006Assignee: Fujitsu LimitedInventors: Kenji Awamoto, Katsuya Irie, Kunio Takayama, Yasunobu Hashimoto
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Patent number: 6924778Abstract: A method for driving a plasma display panel is provided in which dynamic pseudo contours are reduced and pattern noises are suppressed so that image quality of an animation display is improved. In the method, a superposition method is applied only to the area of a display image, which is made of pixels having a gradation at which only one of plural subframes having the same luminance weight concerning the superposition method is lighted and has a luminance gradient within a preset value range between the neighboring pixels.Type: GrantFiled: November 21, 2001Date of Patent: August 2, 2005Assignee: Fujitsu LimitedInventors: Kenji Awamoto, Kunio Takayama
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Patent number: 6768485Abstract: An image display device is provided, which can secure a predetermined display quality regardless of a type of an input image. The color image display device comprises a display device having a delta arrangement screen, a driving circuit, an image decision circuit for deciding which of plural predetermined types an input image is, a memory circuit for memorizing temporarily at least a part of input image data for one frame, an operation circuit for performing an operation process having preset contents in accordance with image data for plural pixels including image data read out of the memory circuit, and an operation control circuit for switching the contents of the operation process in the operation circuit in response to the output of the image decision circuit.Type: GrantFiled: February 20, 2002Date of Patent: July 27, 2004Assignee: Fujitsu LimitedInventors: Kenji Awamoto, Katsuya Irie, Kunio Takayama
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Patent number: 6747614Abstract: A driving method of a plasma display panel is provided in which background light emission is reduced so that display contrast is improved. The method comprises the steps of resetting for equalizing wall charge in cells constituting a screen, addressing for controlling potentials of address electrodes crossing display electrodes in accordance with display data, and sustaining for applying a sustaining voltage to the cells so as to generate display discharges. The address electrodes are grouped in accordance with discharge characteristics of cells corresponding to each address electrode. In the resetting step, potential control that is unique to each group is performed so that luminance of the discharge light emission in the reset becomes uniform among cells having different discharge characteristics.Type: GrantFiled: July 16, 2001Date of Patent: June 8, 2004Assignee: Fujitsu LimitedInventor: Kunio Takayama
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Patent number: 6720940Abstract: A method for driving a plasma display panel is provided, in which an addressing unsusceptible to influence of a variation of operating environment without increasing withstand voltage of circuit components. The method comprises the steps of replacing a frame with a plurality of subframes having luminance weights, setting on or off of light emission of cells for each of the subframes so as to realize a gradation display and providing a drive halt period between at least one of the plural subframe periods allocated to each of the subframes and the next subframe period only when a display load exceeds a preset value.Type: GrantFiled: November 28, 2001Date of Patent: April 13, 2004Assignee: Fujitsu LimitedInventors: Kenji Awamoto, Kunio Takayama
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Publication number: 20040001036Abstract: A method for driving a plasma display panel is provided in which a time necessary for an addressing process is shortened without using any special driving component. The method comprises an addressing process that includes the steps of setting light emission operation of the cells of a display of one screen, starting j-th row selection at a point during (j−1)th row selection, and changing the data electrodes from a control state corresponding to display data of the (j−1)th row to a control state corresponding to display data of the j-th row during a period in which the (j−1)th row selection and the j-th row selection are overlapped with each other.Type: ApplicationFiled: June 12, 2003Publication date: January 1, 2004Applicant: FUJITSU LIMITEDInventors: Kunio Takayama, Kenji Awamoto, Yasunobu Hashimoto
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Publication number: 20030174151Abstract: A data conversion circuit is provided for displaying a high definition image whose resolution is different from that of a display screen having a cell arrangement that is not a square arrangement. The data conversion circuit performs addition operation with weighting that is also resolution conversion of the integer ratio M:N and data correction for improving a linear display quality for input image data.Type: ApplicationFiled: January 21, 2003Publication date: September 18, 2003Applicant: FUJITSU LIMITEDInventors: Kenji Awamoto, Katsuya Irie, Kunio Takayama, Yasunobu Hashimoto
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Publication number: 20030067426Abstract: An image display device is provided, which can secure a predetermined display quality regardless of a type of an input image. The color image display device comprises a display device having a delta arrangement screen, a driving circuit, an image decision circuit for deciding which of plural predetermined types an input image is, a memory circuit for memorizing temporarily at least a part of input image data for one frame, an operation circuit for performing an operation process having preset contents in accordance with image data for plural pixels including image data read out of the memory circuit, and an operation control circuit for switching the contents of the operation process in the operation circuit in response to the output of the image decision circuit.Type: ApplicationFiled: February 20, 2002Publication date: April 10, 2003Applicant: FUJITSU LIMITEDInventors: Kenji Awamoto, Katsuya Irie, Kunio Takayama
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Patent number: 6525486Abstract: A method for driving an AC type plasma display panel is provided in which time necessary for addressing can be shortened without deteriorating stability of a display. Before the addressing, a reset process is performed by applying an increasing waveform voltage between a reference potential line and a scan electrode so as to equalize charge in all cells. In the addressing, a selection voltage Vya1 having the same polarity as a final applied voltage Vyr2 in the reset process and an absolute value larger than the voltage Vyr2 by a potential difference &Dgr;Vy is applied between a scan electrode corresponding to a selected row and the reference potential line.Type: GrantFiled: December 19, 2001Date of Patent: February 25, 2003Assignee: Fujitsu LimitedInventors: Kenji Awamoto, Yasunobu Hashimoto, Koichi Sakita, Kunio Takayama
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Publication number: 20030001512Abstract: A method for driving an AC type plasma display panel is provided in which time necessary for addressing can be shortened without deteriorating stability of a display. Before the addressing, a reset process is performed by applying an increasing waveform voltage between a reference potential line and a scan electrode so as to equalize charge in all cells. In the addressing, a selection voltage Vya1 having the same polarity as a final applied voltage Vyr2 in the reset process and an absolute value larger than the voltage Vyr2 by a potential difference Vy is applied between a scan electrode corresponding to a selected row and the reference potential line.Type: ApplicationFiled: December 19, 2001Publication date: January 2, 2003Applicant: FUJITSU LIMITEDInventors: Kenji Awamoto, Yasunobu Hashimoto, Koichi Sakita, Kunio Takayama