Patents by Inventor Kunitoshi KAMADA

Kunitoshi KAMADA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device
    Patent number: 10192594
    Abstract: A semiconductor device includes a voltage hold circuit that raises a second boosted voltage with rise of an output voltage of a booster circuit that generates a first boosted voltage and then maintains the second boosted voltage at a point when the output voltage reaches a hold voltage level after that, and a first switch that short-circuits a first output terminal through which the first boosted voltage is output and a second output terminal through which the second boosted voltage is output until the output voltage reaches the hold voltage level.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: January 29, 2019
    Assignee: Renesas Electronics Corporation
    Inventors: Masao Yamashiro, Tatsuya Bando, Kunitoshi Kamada, Hiroshi Sato
  • SEMICONDUCTOR DEVICE
    Publication number: 20170162239
    Abstract: A semiconductor device includes a voltage hold circuit that raises a second boosted voltage with rise of an output voltage of a booster circuit that generates a first boosted voltage and then maintains the second boosted voltage at a point when the output voltage reaches a hold voltage level after that, and a first switch that short-circuits a first output terminal through which the first boosted voltage is output and a second output terminal through which the second boosted voltage is output until the output voltage reaches the hold voltage level.
    Type: Application
    Filed: February 17, 2017
    Publication date: June 8, 2017
    Applicant: Renesas Electronics Corporation
    Inventors: Masao YAMASHIRO, Tatsuya BANDO, Kunitoshi KAMADA, Hiroshi SATO
  • Semiconductor device
    Patent number: 9614439
    Abstract: A semiconductor device includes a voltage hold circuit that raises a second boosted voltage with rise of an output voltage of a booster circuit that generates a first boosted voltage and then maintains the second boosted voltage at a point when the output voltage reaches a hold voltage level after that, and a first switch that short-circuits a first output terminal through which the first boosted voltage is output and a second output terminal through which the second boosted voltage is output until the output voltage reaches the hold voltage level.
    Type: Grant
    Filed: October 21, 2015
    Date of Patent: April 4, 2017
    Assignee: Renesas Electronics Corporation
    Inventors: Masao Yamashiro, Tatsuya Bando, Kunitoshi Kamada, Hiroshi Sato
  • SEMICONDUCTOR DEVICE
    Publication number: 20160043639
    Abstract: A semiconductor device includes a voltage hold circuit that raises a second boosted voltage with rise of an output voltage of a booster circuit that generates a first boosted voltage and then maintains the second boosted voltage at a point when the output voltage reaches a hold voltage level after that, and a first switch that short-circuits a first output terminal through which the first boosted voltage is output and a second output terminal through which the second boosted voltage is output until the output voltage reaches the hold voltage level.
    Type: Application
    Filed: October 21, 2015
    Publication date: February 11, 2016
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Masao YAMASHIRO, Tatsuya BANDO, Kunitoshi KAMADA, Hiroshi SATO
  • Semiconductor device
    Patent number: 9201439
    Abstract: A semiconductor device includes a voltage hold circuit that raises a second boosted voltage with rise of an output voltage of a booster circuit that generates a first boosted voltage and then maintains the second boosted voltage at a point when the output voltage reaches a hold voltage level after that, and a first switch that short-circuits a first output terminal through which the first boosted voltage is output and a second output terminal through which the second boosted voltage is output until the output voltage reaches the hold voltage level.
    Type: Grant
    Filed: January 28, 2013
    Date of Patent: December 1, 2015
    Assignee: Renesas Electronics Corporation
    Inventors: Masao Yamashiro, Tatsuya Bando, Kunitoshi Kamada, Hiroshi Sato
  • SEMICONDUCTOR DEVICE
    Publication number: 20130241515
    Abstract: A semiconductor device includes a voltage hold circuit that raises a second boosted voltage with rise of an output voltage of a booster circuit that generates a first boosted voltage and then maintains the second boosted voltage at a point when the output voltage reaches a hold voltage level after that, and a first switch that short-circuits a first output terminal through which the first boosted voltage is output and a second output terminal through which the second boosted voltage is output until the output voltage reaches the hold voltage level.
    Type: Application
    Filed: January 28, 2013
    Publication date: September 19, 2013
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Masao YAMASHIRO, Tatsuya BANDO, Kunitoshi KAMADA, Hiroshi SATO