Patents by Inventor Kunitoshi Yamamoto

Kunitoshi Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140309835
    Abstract: A path finding device includes a search unit, a calculation unit, and a selection unit. The search unit finds paths to reach a goal point from a start point while detouring around a stationary obstacle. The calculation unit calculates, for each of the found paths, an encounter probability that is a probability of encountering a non-stationary obstacle using previously accumulated non-stationary obstacle information. The selection unit selects a path with a lowest encounter probability among the found paths.
    Type: Application
    Filed: December 18, 2013
    Publication date: October 16, 2014
    Applicant: FUJI XEROX CO., LTD.
    Inventor: Kunitoshi YAMAMOTO
  • Patent number: 6733954
    Abstract: Through holes are formed at four peripheral edges of a plurality of semiconductor chip placement regions of an insulating substrate, except for coupling portions partially arranged thereat. A substrate sheet for semiconductor module is used in which connecting portions between inner lead portions and outer lead portions arranged on both surfaces of the substrate are formed in pattern on the side wall surface of the through hole. The semiconductor chip is mounted on each region, electrode terminals thereof and the inner lead portions are electrically connected to each other, the chip is sealed, and then the coupling portions are cut.
    Type: Grant
    Filed: March 26, 2003
    Date of Patent: May 11, 2004
    Assignee: Nissha Printing Co., Ltd.
    Inventors: Kunitoshi Yamamoto, Koichiro Tsuji
  • Patent number: 6686824
    Abstract: A toroidal printed coil includes a plurality of annular holes (2) and a plurality of center holes (3) surrounded by the annular holes (2) in an insulating substrate (1). A plurality of annular juts (4), each comprising a portion surrounded by the annular hole (2) and the center hole (3), are formed. A printed coil sheet having a plurality of toroidal printed coils, in which a conductor film (6) is spirally formed at front-and-rear surfaces and side surfaces of annular portions (5) of the annular juts (4) with each annular portion taken as an axis, is obtained. With this printed coil sheet, a plurality of toroidal printed coils (P) are obtained by cutting the insulating substrate (1) off from the individual annular juts (4).
    Type: Grant
    Filed: January 28, 2000
    Date of Patent: February 3, 2004
    Assignee: Nissha Printing Co., Ltd.
    Inventor: Kunitoshi Yamamoto
  • Publication number: 20030157437
    Abstract: Through holes are formed at four peripheral edges of a plurality of semiconductor chip placement regions of an insulating substrate, except for coupling portions partially arranged thereat. A substrate sheet for semiconductor module is used in which connecting portions between inner lead portions and outer lead portions arranged on both surfaces of the substrate are formed in pattern on the side wall surface of the through hole. The semiconductor chip is mounted on each region, electrode terminals thereof and the inner lead portions are electrically connected to each other, the chip is sealed, and then the coupling portions are cut.
    Type: Application
    Filed: March 26, 2003
    Publication date: August 21, 2003
    Inventors: Kunitoshi Yamamoto, Koichiro Tsuji
  • Patent number: 6573028
    Abstract: Through holes are formed at four peripheral edges of a plurality of semiconductor chip placement regions of an insulating substrate, except for coupling portions partially arranged thereat. A substrate sheet for semiconductor module is used in which connecting portions between inner lead portions and outer lead portions arranged on both surfaces of the substrate are formed in pattern on the side wall surface of the through hole. The semiconductor chip is mounted on each region, electrode terminals thereof and the inner lead portions are electrically connected to each other, the chip is sealed, and then the coupling portions are cut.
    Type: Grant
    Filed: August 8, 2000
    Date of Patent: June 3, 2003
    Assignee: Nissha Printing Co., Ltd.
    Inventors: Kunitoshi Yamamoto, Koichiro Tsuji
  • Patent number: 5612962
    Abstract: A pin-scan-in system driving circuit drives a pin-scan-in circuit to test short-circuit of the wirings or breaking of the wirings in the circuit-mounting substrate, and this circuit is driven using a reduced number of gates. The pin-scan-in system driving circuit drives the pin-scan-in circuit provided in an LSI logic circuit, and the LSI logic circuit is provided with a pin-scan-in circuit selector which selects the pin-scan-in circuit and a selected condition-holding circuit which holds the condition selected by the pin-scan-in circuit selector.
    Type: Grant
    Filed: June 4, 1993
    Date of Patent: March 18, 1997
    Assignee: Fujitsu Limited
    Inventors: Toshiro Sato, Kunitoshi Yamamoto, Hiroyuki Adachi
  • Patent number: 5363294
    Abstract: A surface light source device includes a light guiding plate which is transparent, a line light source provided on one end edge of the light guiding plate, an end edge reflection layer provided on the other end edge of the light guiding plate, and a light diffusion/transmission section provided on a back face of the light guiding plate. A ratio of an area of the light diffusion/transmission section to a whole area of the back face of the light guiding plate gradually increases with an increase in distance from the light source end edge in a region from the end edge on the light source end of the light guiding plate to a position at which a surface emission luminance of the light guiding plate is lowest, and is constant in a region from the position to the other end edge on the end edge reflection layer end of the light guiding plate. A back face reflection layer which is white is provided on the back face of the light guiding plate.
    Type: Grant
    Filed: March 27, 1992
    Date of Patent: November 8, 1994
    Assignee: Nissha Printing Co., Ltd.
    Inventors: Kunitoshi Yamamoto, Hiroshi Fukushima
  • Patent number: 5329240
    Abstract: A clock adjustment system for economically adjusting the output phases of a printed circuit board and an IC comprises a gate circuit for connecting an input of a measured circuit to an output. By turning the gate circuit on and by observing the oscillation of a measured circuit, the phase of the measured circuit is adjusted.
    Type: Grant
    Filed: May 20, 1993
    Date of Patent: July 12, 1994
    Assignee: Fujitsu Limited
    Inventors: Katsuhisa Kubota, Kunitoshi Yamamoto, Kazuharu Nakano
  • Patent number: 4728390
    Abstract: A filmy coil comprising a metal conductive layer of the thin-line type having a spiral pattern on one side or both sides of an optional insulating substrate film or sheet, characterized in that the interval between each adjacent metal conductive line is smaller than the thickness of the metal conductive layer, and a manufacturing method for such a filmy coil characterized in that a photoresist layer, the patterns of both sides thereof being mirror images, is made up on both sides of the metal conductive foil or sheet, then both sides of the photoresist layer are etched to the depth of 30 to 40% of the thickness of the metal conductive foil or sheet by means of chemical etching, one side of the metal conductive foil or sheet is coated by an isolated resin coat or laminated with an isolated substrate film or sheet layer, the other side of said photoresist layer is etched also by means of chemical etching until the etching grooves on both sides pass through to be connected with each other, to produce a filmy coi
    Type: Grant
    Filed: February 13, 1986
    Date of Patent: March 1, 1988
    Assignee: Nissha Printing Co., Ltd.
    Inventors: Kunitoshi Yamamoto, Yasuji Mori, Torayoshi Iwata