Patents by Inventor Kuniyasu Ishihara

Kuniyasu Ishihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170076102
    Abstract: A semiconductor device capable of arbitrarily operating a microprocessor while protecting a secure program is provided. The semiconductor device includes a memory equipped with a first program area in which an arbitrary program is stored, and a second program area in which a secure program is stored, a microprocessor which outputs an address designating an instruction in a program, and a memory protection unit which controls access to the memory based on the address outputted from the microprocessor. When the address outputted from the microprocessor by executing the program in the first program area designates a branch allowable area in the second program area, the memory protection unit permits access to the memory. When the address designates a branch prohibition area, the memory protection unit inhibits access to the memory.
    Type: Application
    Filed: July 19, 2016
    Publication date: March 16, 2017
    Inventors: Kuniyasu ISHIHARA, Hiroshi UEKI
  • Patent number: 9501113
    Abstract: There is a need to solve a possible system malfunction when a power supply voltage decreases steeply. To solve this problem, a control method is provided for a voltage detection system having an interrupt mode and a reset mode. First and second detection levels are configured. When a power supply voltage is higher than the first detection level, a latch circuit is placed in a first state to enable the interrupt mode. When the power supply voltage becomes lower than or equal to the first detection level, an interrupt signal is generated to change the latch circuit from the first state to a second state and enable the reset mode. A system reset is issued when the power supply voltage becomes lower than or equal to the second detection level in the reset mode.
    Type: Grant
    Filed: June 20, 2011
    Date of Patent: November 22, 2016
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Kyouhei Kouno, Shinichi Nakatsu, Kazuyo Yamaguchi, Kimiharu Eto, Kuniyasu Ishihara, Hirotaka Shimoda, Yuusuke Urakawa, Seiya Indo
  • Patent number: 9342097
    Abstract: A microcontroller includes a CPU (Central Processing Unit), a data input unit, and an oscillator that supplies a clock signal in response to operational modes of the microcontroller. The operational modes include a STOP mode, a SNOOZE mode and a RUN mode, in the STOP mode, the oscillator and the CPU are stopped, in the RUN mode, the CPU and the data input unit operate using the clock signal supplied from the oscillator, and in the SNOOZE mode, the oscillator starts and supplies the clock signal to the data input unit when the data input unit receives first data, and the microcontroller switches to the RUN mode after the data input unit receives second data using the clock signal.
    Type: Grant
    Filed: June 4, 2014
    Date of Patent: May 17, 2016
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Yosuke Kawanaka, Seiya Indo, Tomoya Katsuki, Shinichi Nakatsu, Kimiharu Eto, Hirotaka Shimoda, Kuniyasu Ishihara, Yuusuke Urakawa, Yuusuke Sakaguchi, Shingo Furuta
  • Publication number: 20140289547
    Abstract: A microcontroller includes a CPU (Central Processing Unit), a data input unit, and an oscillator that supplies a clock signal in response to operational modes of the microcontroller. The operational modes include a STOP mode, a SNOOZE mode and a RUN mode, in the STOP mode, the oscillator and the CPU are stopped, in the RUN mode, the CPU and the data input unit operate using the clock signal supplied from the oscillator, and in the SNOOZE mode, the oscillator starts and supplies the clock signal to the data input unit when the data input unit receives first data, and the microcontroller switches to the RUN mode after the data input unit receives second data using the clock signal.
    Type: Application
    Filed: June 4, 2014
    Publication date: September 25, 2014
    Applicant: Renesas Electronics Corporation
    Inventors: Yosuke Kawanaka, Seiya Indo, Tomoya Katsuki, Shinichi Nakatsu, Kimiharu Eto, Hirotaka Shimoda, Kuniyasu Ishihara, Yuusuke Urakawa, Yuusuke Sakaguchi, Shingo Furuta
  • Patent number: 8749224
    Abstract: A voltage detection circuit including a voltage selection circuit that outputs a voltage commensurate with a power supply voltage as a first voltage; a detection voltage selection circuit that selects either an external input voltage inputted from an external terminal or the first voltage according to a first control signal, and outputs it as a comparison voltage; a reference voltage generation circuit that generates a reference voltage; a comparator that compares the reference voltage and the comparison voltage, and outputs the comparison result as a detection signal; a control circuit that generates the first control signal so that the detection voltage selection circuit may output either the first voltage or the external input voltage as the comparison voltage by time division, and when a variation of the first voltage is detected, generates the first control signal so that the detection object selection circuit may output the first voltage as the comparison voltage.
    Type: Grant
    Filed: July 21, 2011
    Date of Patent: June 10, 2014
    Assignee: Renesas Electronics Corporation
    Inventors: Rumi Matsushita, Shinichi Nakatsu, Kuniyasu Ishihara, Kimiharu Eto, Seiya Indo, Hirotaka Shimoda
  • Patent number: 8751842
    Abstract: A microcontroller includes a data input unit that receives input data and outputs a start request signal according to the input data upon receiving the input data; an oscillator that starts according to the start request signal, to generate a clock signal; a clock signal supply control unit that outputs the start request signal supplied from the data input unit to the oscillator, and supplies the clock signal supplied from the oscillator generated after the start as a first clock signal and a second clock signal that are operation clock signals of the data input unit; and a CPU that operates the second clock signal as an operation clock, and performs processing according to the input data when the second clock signal is operated.
    Type: Grant
    Filed: May 13, 2011
    Date of Patent: June 10, 2014
    Assignee: Renesas Electronics Corporation
    Inventors: Yosuke Kawanaka, Seiya Indo, Tomoya Katsuki, Shinichi Nakatsu, Kimiharu Eto, Hirotaka Shimoda, Kuniyasu Ishihara, Yuusuke Urakawa, Yuusuke Sakaguchi, Shingo Furuta
  • Publication number: 20120303856
    Abstract: A microcomputer includes a CPU (Central Processing Unit), a DMA (Direct Memory Access) processing unit, and a control unit. The control unit controls a processing speed of the CPU to be faster as the number of holding transfers increases, in which the number of holding transfers is the number of DMA transfers held to the DMA processing unit.
    Type: Application
    Filed: May 17, 2012
    Publication date: November 29, 2012
    Inventors: Naoki Nakanose, Kuniyasu Ishihara, Ryoichi Yamaguchi
  • Publication number: 20120025805
    Abstract: A voltage detection circuit including a voltage selection circuit that outputs a voltage commensurate with a power supply voltage as a first voltage; a detection voltage selection circuit that selects either an external input voltage inputted from an external terminal or the first voltage according to a first control signal, and outputs it as a comparison voltage; a reference voltage generation circuit that generates a reference voltage; a comparator that compares the reference voltage and the comparison voltage, and outputs the comparison result as a detection signal; a control circuit that generates the first control signal so that the detection voltage selection circuit may output either the first voltage or the external input voltage as the comparison voltage by time division, and when a variation of the first voltage is detected, generates the first control signal so that the detection object selection circuit may output the first voltage as the comparison voltage.
    Type: Application
    Filed: July 21, 2011
    Publication date: February 2, 2012
    Inventors: Rumi MATSUSHITA, Shinichi NAKATSU, Kuniyasu ISHIHARA, Kimiharu ETO, Seiya INDO, Hirotaka SHIMODA
  • Publication number: 20110313700
    Abstract: There is a need to solve a possible system malfunction when a power supply voltage decreases steeply. To solve this problem, a control method is provided for a voltage detection system having an interrupt mode and a reset mode. First and second detection levels are configured. When a power supply voltage is higher than the first detection level, a latch circuit is placed in a first state to enable the interrupt mode. When the power supply voltage becomes lower than or equal to the first detection level, an interrupt signal is generated to change the latch circuit from the first state to a second state and enable the reset mode. A system reset is issued when the power supply voltage becomes lower than or equal to the second detection level in the reset mode.
    Type: Application
    Filed: June 20, 2011
    Publication date: December 22, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Kyouhei KOUNO, Shinichi NAKATSU, Kazuyo YAMAGUCHI, Kimiharu ETO, Kuniyasu ISHIHARA, Hirotaka SHIMODA, Yuusuke URAKAWA, Seiya INDO
  • Publication number: 20110285429
    Abstract: A microcontroller includes a data input unit that receives input data and outputs a start request signal according to the input data upon receiving the input data; an oscillator that starts according to the start request signal, to generate a clock signal; a clock signal supply control unit that outputs the start request signal supplied from the data input unit to the oscillator, and supplies the clock signal supplied from the oscillator generated after the start as a first clock signal and a second clock signal that are operation clock signals of the data input unit; and a CPU that operates the second clock signal as an operation clock, and performs processing according to the input data when the second clock signal is operated.
    Type: Application
    Filed: May 13, 2011
    Publication date: November 24, 2011
    Applicant: Renesas Electronics Corporation
    Inventors: Yosuke Kawanaka, Seiya Indo, Tomoya Katsuki, Shinichi Nakatsu, Kimiharu Eto, Hirotaka Shimoda, Kuniyasu Ishihara, Yuusuke Urakawa, Yuusuke Sakaguchi, Shingo Furuta