Patents by Inventor Kuniyasu Kawarada

Kuniyasu Kawarada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor integrated circuit device
    Patent number: 4231108
    Abstract: An improved semiconductor integrated circuit device having a memory cell array formed of integrated injection logic memory cells. The semiconductor integrated circuit according to the present invention includes integration injection logic memory cells which are arranged in matrix form, word lines and bit lines which are connected to the memory cells arranged in the row or column directions, one of the word lines being formed by a semiconductor bulk, current sources provided at least at both ends of the word lines or the bit lines.
    Type: Grant
    Filed: June 13, 1979
    Date of Patent: October 28, 1980
    Assignees: Nippon Telegraph and Telephone Public Corporation, Fujitsu Limited
    Inventors: Masao Suzuki, Toshio Hayashi, Kuniyasu Kawarada, Kazuhiro Toyoda, Chikai Ono
  • Semiconductor integrated circuit device
    Patent number: 4228525
    Abstract: A semiconductor integrated circuit device has an array of memory cells formed by integrated injection logic. A desired number of dummy cells are provided at both ends of each line of the array, so that a write current, which flows when the memory cell near the dummy cell is selected, is shunted by the dummy cell, thereby the currents which flow in the memory cells in the line of the memory array are equalized.
    Type: Grant
    Filed: May 11, 1979
    Date of Patent: October 14, 1980
    Assignees: Nippon Telegraph and Telephone Public Corporation, Fujitsu Limited
    Inventors: Kuniyasu Kawarada, Masao Suzuki, Chikai Ono, Kazuhiro Toyoda