Patents by Inventor Kuniyuki Matsunaga

Kuniyuki Matsunaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6587163
    Abstract: A liquid crystal display device, or more particularly, an active matrix type liquid crystal display device having a pixel electrode formed in a pixel field defined on one of two transparent substrates opposed to each other with a liquid crystal layer between them. The pixel electrode is overlapped a signal line, which is formed in a portion of the one transparent substrate coincident with a black matrix, with a dielectric between them. The width of the overlap is set to a value satisfying a condition that an electric field induced between the signal line and pixel electrode will not invade into the pixel field defined with the black matrix. Owing to the structure, inhomogeneous luminance caused by a source electrode of a thin film transistor can be avoided. Moreover, inhomogeneous luminance caused by a capacitive element can be avoided.
    Type: Grant
    Filed: June 20, 2000
    Date of Patent: July 1, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Takanori Nakayama, Hikaru Ito, Kimitoshi Oogiichi, Kuniyuki Matsunaga
  • Patent number: 6388719
    Abstract: A liquid crystal display device can readily achieve uniformization of the threshold voltages of individual thin film transistors in spite of its simple construction. The liquid crystal display device includes gate signal lines juxtaposed in one direction, drain signal lines juxtaposed to intersect with the gate signal lines, thin film transistors which are respectively formed in areas each surrounded by the gate signal lines and the drain signal lines and are driven by supply of scanning signals from the gate signal lines, pixel electrodes to which video signals from the drain signal lines are to be supplied via the respective thin film transistors, a first terminal for applying voltages to the respective gate signal lines via diodes, and a second terminal for applying voltages to the respective drain signal lines via diodes.
    Type: Grant
    Filed: June 15, 2000
    Date of Patent: May 14, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Kuniyuki Matsunaga, Kazuya Nakamura, Hikaru Itou, Masataka Natori, Kimitoshi Oogiichi, Takanori Nakayama, Hitoshi Komeno, Hiroshi Ookawara
  • Patent number: 5949502
    Abstract: A liquid crystal display device in which counter-measures are taken for static electricity from the step of forming wiring lines of a substrate on the side where thin film transistors or switching elements are formed to the step of completing module mounting is suited for improving the productivity and for lowering the production cost of the display device. For this purpose, the liquid crystal display device is characterized in that resistor elements for connecting gate lines or drain lines are disposed inside a seal and are arranged in one or more lines outside an effective pixel region, or additional gate lines and additional pixels are arranged in a plurality of lines outside the first gate line or the last gate line in the effective pixel region, and the additional gate lines are short-circuited with each other at their end portions.
    Type: Grant
    Filed: December 17, 1997
    Date of Patent: September 7, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Kuniyuki Matsunaga, Makoto Tsumura, Junichi Ohwada, Masahiko Suzuki, Shiro Ueda
  • Patent number: 5844255
    Abstract: The i-type semiconductor layer (AS) and the gate insulating film (GI) are patterned along and in the same shape as the video signal lines (DL) between the video signal lines (DL) and the first transparent glass substrate (SUB1 ). The backlight is disposed on the second transparent glass substrate (SUB2) side. Therefore, signal line reflection of external light can be prevented, improving the display quality.
    Type: Grant
    Filed: February 5, 1997
    Date of Patent: December 1, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Masahiko Suzuki, Kikuo Ono, Junichi Ohwada, Hikaru Itoh, Tatsuo Kamei, Kuniyuki Matsunaga
  • Patent number: 5748179
    Abstract: A liquid crystal display device is provided which reduces the resistance of input wires disposed between a flexible board and driving ICs mounted in a flip-chip style, and enhances resistance against electrocorrosion of input terminals thereof. The liquid crystal display device includes two transparent insulating substrates (SUB1, SUB2) confronting each other through a liquid crystal layer, plural liquid crystal driving circuits (ICs) mounted in a flip-chip style on a surface of one of the substrates located at the side of the liquid crystal layer, a flexible board (FPC) for inputting a signal to each of the liquid crystal driving circuits, and plural input wires (Td) provided on the surface of the one substrate at the side of the liquid crystal layer to connect output terminals of the flexible board to input terminals of the liquid crystal driving circuits.
    Type: Grant
    Filed: May 13, 1996
    Date of Patent: May 5, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Hikaru Ito, Masataka Natori, Masahiko Suzuki, Kimitoshi Ohgiichi, Kuniyuki Matsunaga, Junichi Ohwada, Masumi Sasuga, Shiro Ueda
  • Patent number: 5668649
    Abstract: The i-type semiconductor layer (AS) and the gate insulating film (GI) are patterned along and in the same shape as the video signal lines (DL) between the video signal lines (DL) and the first transparent glass substrate (SUB1). The backlight is disposed on the second transparent glass substrate (SUB2) side. Therefore, signal line reflection of external light can be prevented, improving the display quality.
    Type: Grant
    Filed: March 1, 1995
    Date of Patent: September 16, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Masahiko Suzuki, Kikuo Ono, Junichi Ohwada, Hikaru Itoh, Tatsuo Kamei, Kuniyuki Matsunaga
  • Patent number: 5510918
    Abstract: The gate terminal GTM is formed of the aluminum film g and the transparent conductive film dl, which is deposited on the aluminum film g. The gate terminal GTM is formed at its side with a connection portion where the transparent conductive film dl is not provided but where a connection film CNF made of second and third conductive films d2, d3 is provided to connect the aluminum film g and the transparent conductive film dl. At the side of the gate terminal GTM where the connection film CNF is provided, a terminal side portion protective film TSP1 at the same level as the passivation film PSV1 is formed. At the other side of the gate terminal GTM, a terminal side portion protective film TSP2 is provided, which consists of a film at the same level as the insulation film GI and a film at the same level as the passivation film PSV1.
    Type: Grant
    Filed: May 27, 1994
    Date of Patent: April 23, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Kuniyuki Matsunaga, Junichi Ohwada, Masahiko Suzuki, Hideaki Yamamoto