Patents by Inventor Kuniyuki Narukawa

Kuniyuki Narukawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device having a multilayer interconnection structure and fabrication process thereof
    Publication number: 20070026673
    Abstract: A multilayer interconnection structure includes a first interconnection layer having a copper interconnection pattern and a second interconnection layer having an aluminum interconnection layer and formed on the first interconnection layer via an intervening interlayer insulation film, wherein a tungsten plug is formed in a via-hole formed in the interlayer insulation film so as to connect the first interconnection layer and the second interconnection layer electrically. The via-hole has a depth/diameter ratio of 1.25 or more, and there is formed a conductive nitride film between the outer wall of the tungsten plug and an inner wall of the via-hole such that the entirety of the conductive nitride film is formed of a conductive nitride.
    Type: Application
    Filed: October 3, 2006
    Publication date: February 1, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Toshio Takayama, Kuniyuki Narukawa, Hiroshi Mizutani
  • Semiconductor device having a multilayer interconnection structure and fabrication process thereof
    Patent number: 7145241
    Abstract: A multilayer interconnection structure includes a first interconnection layer having a copper interconnection pattern and a second interconnection layer having an aluminum interconnection layer and formed on the first interconnection layer via an intervening interlayer insulation film, wherein a tungsten plug is formed in a via-hole formed in the interlayer insulation film so as to connect the first interconnection layer and the second interconnection layer electrically. The via-hole has a depth/diameter ratio of 1.25 or more, and there is formed a conductive nitride film between the outer wall of the tungsten plug and an inner wall of the via-hole such that the entirety of the conductive nitride film is formed of a conductive nitride.
    Type: Grant
    Filed: December 16, 2003
    Date of Patent: December 5, 2006
    Assignee: Fujitsu Limited
    Inventors: Toshio Takayama, Kuniyuki Narukawa, Hiroshi Mizutani
  • Interconnection structure and interconnection structure formation method
    Patent number: 6933609
    Abstract: An insulating film covering a Cu interconnection is formed. A contact hole which partially exposes the surface of the Cu interconnection is formed in the insulating film. A series of steps (steps (a) to (d)) including (a) a step of continuously supplying WF6 gas for a predetermined time, (b) a step of continuously exhausting the WF6 gas atmosphere for a predetermined time, (c) a step of continuously supplying SiH4 gas for a predetermined time, and (d) a step of continuously exhausting the SiH4 gas atmosphere for a predetermined time, is repeatedly executed to form W nuclei in the contact hole. Then, a W film is buried into the contact hole. This interconnection structure formation method can reliably bury the W film into the contact hole while preventing Cu elution from the Cu interconnection to the W plug.
    Type: Grant
    Filed: January 15, 2003
    Date of Patent: August 23, 2005
    Assignee: Fujitsu Limited
    Inventor: Kuniyuki Narukawa
  • Semiconductor device having a multilayer interconnection structure and fabrication process thereof
    Publication number: 20040124537
    Abstract: A multilayer interconnection structure includes a first interconnection layer having a copper interconnection pattern and a second interconnection layer having an aluminum interconnection layer and formed on the first interconnection layer via an intervening interlayer insulation film, wherein a tungsten plug is formed in a via-hole formed in the interlayer insulation film so as to connect the first interconnection layer and the second interconnection layer electrically. The via-hole has a depth/diameter ratio of 1.25 or more, and there is formed a conductive nitride film between the outer wall of the tungsten plug and an inner wall of the via-hole such that the entirety of the conductive nitride film is formed of a conductive nitride.
    Type: Application
    Filed: December 16, 2003
    Publication date: July 1, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Toshio Takayama, Kuniyuki Narukawa, Hiroshi Mizutani
  • Interconnection structure and interconnection structure formation method
    Publication number: 20030157750
    Abstract: An insulating film covering a Cu interconnection is formed. A contact hole which partially exposes the surface of the Cu interconnection is formed in the insulating film. A series of steps (steps (a) to (d)) including (a) a step of continuously supplying WF6 gas for a predetermined time, (b) a step of continuously exhausting the WF6 gas atmosphere for a predetermined time, (c) a step of continuously supplying SiH4 gas for a predetermined time, and (d) a step of continuously exhausting the SiH4 gas atmosphere for a predetermined time, is repeatedly executed to form W nuclei in the contact hole. Then, a W film is buried into the contact hole. This interconnection structure formation method can reliably bury the W film into the contact hole while preventing Cu elution from the Cu interconnection to the W plug.
    Type: Application
    Filed: January 15, 2003
    Publication date: August 21, 2003
    Applicant: FUJITSU LIMITED
    Inventor: Kuniyuki Narukawa