Abstract: Provided is a planar nano-oscillator array having phase locking function, including two or more planar nano-oscillators which are arranged in parallel. The two oscillators are connected by planar resistors and capacitors, and a structure thereof includes: electrodes; respectively introducing two pairs of laterally arranged parallel insulation notch grooves into two-dimensional electron gas layers, so as to form oscillation channels; vertically disposing separating insulation notch grooves, so that a planar resistor A with low resistance which is connected to the electrode is formed on the left side, and a planar resistor B with low resistance which is connected to the electrode is formed on the right side; and arranging, between the two oscillators, an insulation capacitor notch groove which is parallel to the oscillation channels, insulating materials having a high dielectric constant being filled therein.

Abstract: Provided is a planar nano-oscillator array having phase locking function, including two or more planar nano-oscillators which are arranged in parallel. The two oscillators are connected by planar resistors and capacitors, and a structure thereof includes: electrodes; respectively introducing two pairs of laterally arranged parallel insulation notch grooves into two-dimensional electron gas layers, so as to form oscillation channels; vertically disposing separating insulation notch grooves, so that a planar resistor A with low resistance which is connected to the electrode is formed on the left side, and a planar resistor B with low resistance which is connected to the electrode is formed on the right side; and arranging, between the two oscillators, an insulation capacitor notch groove which is parallel to the oscillation channels, insulating materials having a high dielectric constant being filled therein.

Abstract: A frequency multiplier based on a low dimensional semiconductor structure, including an insulating substrate layer, a semiconductor conducting layer arranged on the surface of the insulating substrate layer, an insulating protective layer arranged on the surface of the semiconductor conducting layer, an insulating carving groove penetrating the semiconductor conducting layer, an inlet electrode arranged on the side surface of the semiconductor conducting layer, and an outlet electrode arranged on the side surface corresponding to the access electrode is provided. The semiconductor conducting layer comprises two two-dimensional, quasi-one-dimensional, or one-dimensional current carrying channels near to and parallel to each other. The frequency multiplier has advantages that the structure is simple, the process is easy to implement, no extra filter circuit needs to be added, dependence on material characteristics is little, and the selection range of materials is wide.

Abstract: A frequency multiplier based on a low dimensional semiconductor structure, including an insulating substrate layer, a semiconductor conducting layer arranged on the surface of the insulating substrate layer, an insulating protective layer arranged on the surface of the semiconductor conducting layer, an insulating carving groove penetrating the semiconductor conducting layer, an inlet electrode arranged on the side surface of the semiconductor conducting layer, and an outlet electrode arranged on the side surface corresponding to the access electrode is provided. The semiconductor conducting layer comprises two two-dimensional, quasi-one-dimensional, or one-dimensional current carrying channels near to and parallel to each other. The frequency multiplier has advantages that the structure is simple, the process is easy to implement, no extra filter circuit needs to be added, dependence on material characteristics is little, and the selection range of materials is wide.